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!fixup detect multi-use min/max recurrences.
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10 files changed

+159
-122
lines changed

10 files changed

+159
-122
lines changed

‎llvm/include/llvm/Analysis/IVDescriptors.h‎

Lines changed: 22 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -42,9 +42,13 @@ enum class RecurKind {
4242
And, ///< Bitwise or logical AND of integers.
4343
Xor, ///< Bitwise or logical XOR of integers.
4444
SMin, ///< Signed integer min implemented in terms of select(cmp()).
45+
SMinMultiUse, ///< Signed integer min implemented in terms of select(cmp()).
4546
SMax, ///< Signed integer max implemented in terms of select(cmp()).
47+
SMaxMultiUse, ///< Signed integer max implemented in terms of select(cmp()).
4648
UMin, ///< Unsigned integer min implemented in terms of select(cmp()).
49+
UMinMultiUse, ///< Unsigned integer min implemented in terms of select(cmp()).
4750
UMax, ///< Unsigned integer max implemented in terms of select(cmp()).
51+
UMaxMultiUse, ///< Unsigned integer max implemented in terms of select(cmp()).
4852
FAdd, ///< Sum of floats.
4953
FMul, ///< Product of floats.
5054
FMin, ///< FP min implemented in terms of select(cmp()).
@@ -247,8 +251,24 @@ class RecurrenceDescriptor {
247251

248252
/// Returns true if the recurrence kind is an integer min/max kind.
249253
static bool isIntMinMaxRecurrenceKind(RecurKind Kind) {
250-
return Kind == RecurKind::UMin || Kind == RecurKind::UMax ||
251-
Kind == RecurKind::SMin || Kind == RecurKind::SMax;
254+
return Kind == RecurKind::UMin || Kind == RecurKind::UMinMultiUse ||
255+
Kind == RecurKind::UMax || Kind == RecurKind::UMaxMultiUse ||
256+
Kind == RecurKind::SMin || Kind == RecurKind::SMinMultiUse ||
257+
Kind == RecurKind::SMax || Kind == RecurKind::SMaxMultiUse;
258+
}
259+
260+
static RecurKind convertFromMultiUseKind(RecurKind Kind) {
261+
switch (Kind) {
262+
case RecurKind::UMaxMultiUse:
263+
return RecurKind::UMax;
264+
case RecurKind::UMinMultiUse:
265+
return RecurKind::UMin;
266+
case RecurKind::SMinMultiUse:
267+
return RecurKind::SMin;
268+
case RecurKind::SMaxMultiUse:
269+
return RecurKind::SMax;
270+
}
271+
return Kind;
252272
}
253273

254274
/// Returns true if the recurrence kind is a floating-point min/max kind.

‎llvm/lib/Analysis/IVDescriptors.cpp‎

Lines changed: 39 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -214,6 +214,41 @@ static bool checkOrderedReduction(RecurKind Kind, Instruction *ExactFPMathInst,
214214
return true;
215215
}
216216

217+
static std::optional<RecurrenceDescriptor>
218+
getMultiUseMinMax(PHINode *Phi, RecurKind Kind, Loop *TheLoop) {
219+
BasicBlock *Latch = TheLoop->getLoopLatch();
220+
if (!Latch)
221+
return std::nullopt;
222+
Value *Inc = Phi->getIncomingValueForBlock(Latch);
223+
RecurKind RK;
224+
if (Phi->hasOneUse() ||
225+
!RecurrenceDescriptor::isIntMinMaxRecurrenceKind(Kind))
226+
return std::nullopt;
227+
228+
Value *A, *B;
229+
if (match(Inc, m_OneUse(m_UMin(m_Value(A), m_Value(B)))))
230+
RK = RecurKind::UMinMultiUse;
231+
else if (match(Inc, m_OneUse(m_UMax(m_Value(A), m_Value(B)))))
232+
RK = RecurKind::UMaxMultiUse;
233+
else if (match(Inc, m_OneUse(m_SMax(m_Value(A), m_Value(B)))))
234+
RK = RecurKind::SMaxMultiUse;
235+
else if (match(Inc, m_OneUse(m_SMin(m_Value(A), m_Value(B)))))
236+
RK = RecurKind::SMinMultiUse;
237+
else
238+
return std::nullopt;
239+
240+
if (RecurrenceDescriptor::convertFromMultiUseKind(RK) != Kind || A == B ||
241+
(A != Phi && B != Phi))
242+
return std::nullopt;
243+
244+
SmallPtrSet<Instruction *, 4> CastInsts;
245+
Value *RdxStart = Phi->getIncomingValueForBlock(TheLoop->getLoopPreheader());
246+
RecurrenceDescriptor RD(RdxStart, nullptr, nullptr, RK, FastMathFlags(),
247+
nullptr, Phi->getType(), false, false, CastInsts,
248+
-1U);
249+
return {RD};
250+
}
251+
217252
bool RecurrenceDescriptor::AddReductionVar(
218253
PHINode *Phi, RecurKind Kind, Loop *TheLoop, FastMathFlags FuncFMF,
219254
RecurrenceDescriptor &RedDes, DemandedBits *DB, AssumptionCache *AC,
@@ -225,6 +260,10 @@ bool RecurrenceDescriptor::AddReductionVar(
225260
if (Phi->getParent() != TheLoop->getHeader())
226261
return false;
227262

263+
if (auto RD = getMultiUseMinMax(Phi, Kind, TheLoop)) {
264+
RedDes = *RD;
265+
return true;
266+
}
228267
// Obtain the reduction start value from the value that comes from the loop
229268
// preheader.
230269
Value *RdxStart = Phi->getIncomingValueForBlock(TheLoop->getLoopPreheader());

‎llvm/lib/Transforms/Vectorize/LoopVectorizationLegality.cpp‎

Lines changed: 8 additions & 18 deletions
Original file line numberDiff line numberDiff line change
@@ -808,23 +808,6 @@ bool LoopVectorizationLegality::canVectorizeInstrs() {
808808
}
809809
}
810810

811-
if (range_size(TheLoop->getHeader()->phis()) != FixedOrderRecurrences.size() +
812-
Inductions.size() +
813-
Reductions.size() &&
814-
none_of(TheLoop->getHeader()->phis(), [this](PHINode &P) {
815-
auto I = Reductions.find(&P);
816-
return I != Reductions.end() &&
817-
RecurrenceDescriptor::isFindLastIVRecurrenceKind(
818-
I->second.getRecurrenceKind());
819-
})) {
820-
reportVectorizationFailure("Found an unidentified PHI",
821-
"value that could not be identified as "
822-
"reduction is used outside the loop",
823-
"NonReductionValueUsedOutsideLoop", ORE, TheLoop,
824-
&*TheLoop->getHeader()->phis().begin());
825-
return false;
826-
}
827-
828811
if (!PrimaryInduction) {
829812
if (Inductions.empty()) {
830813
reportVectorizationFailure(
@@ -944,8 +927,15 @@ bool LoopVectorizationLegality::canVectorizeInstr(Instruction &I) {
944927
if (InductionDescriptor::isInductionPHI(Phi, TheLoop, PSE, ID, true) &&
945928
!IsDisallowedStridedPointerInduction(ID)) {
946929
addInductionPhi(Phi, ID, AllowedExit);
930+
return true;
947931
}
948-
return true;
932+
933+
reportVectorizationFailure("Found an unidentified PHI",
934+
"value that could not be identified as "
935+
"reduction is used outside the loop",
936+
"NonReductionValueUsedOutsideLoop", ORE, TheLoop,
937+
Phi);
938+
return false;
949939
} // end of PHI handling
950940

951941
// We handle calls that:

‎llvm/lib/Transforms/Vectorize/LoopVectorize.cpp‎

Lines changed: 3 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -7929,6 +7929,9 @@ void VPRecipeBuilder::collectScaledReductions(VFRange &Range) {
79297929
SmallVector<std::pair<PartialReductionChain, unsigned>>
79307930
PartialReductionChains;
79317931
for (const auto &[Phi, RdxDesc] : Legal->getReductionVars()) {
7932+
if (RecurrenceDescriptor::isMinMaxRecurrenceKind(
7933+
RdxDesc.getRecurrenceKind()))
7934+
continue;
79327935
getScaledReductions(Phi, RdxDesc.getLoopExitInstr(), Range,
79337936
PartialReductionChains);
79347937
}

‎llvm/lib/Transforms/Vectorize/VPlanConstruction.cpp‎

Lines changed: 8 additions & 51 deletions
Original file line numberDiff line numberDiff line change
@@ -920,62 +920,19 @@ bool VPlanTransforms::legalizeUnclassifiedPhis(VPlan &Plan) {
920920
using namespace VPlanPatternMatch;
921921
for (auto &PhiR : make_early_inc_range(
922922
Plan.getVectorLoopRegion()->getEntryBasicBlock()->phis())) {
923-
if (!isa<VPPhi>(&PhiR))
923+
auto *MinMaxPhiR = dyn_cast<VPReductionPHIRecipe>(&PhiR);
924+
if (!MinMaxPhiR || !RecurrenceDescriptor::isIntMinMaxRecurrenceKind(
925+
MinMaxPhiR->getRecurrenceKind()))
924926
continue;
925927

926-
// Check if PhiR is a min/max reduction that has a user inside the loop
927-
// outside the min/max reduction chain. The other user must be the compare
928-
// of a FindLastIV reduction chain.
929-
auto *MinMaxPhiR = cast<VPPhi>(&PhiR);
930-
auto *MinMaxOp = dyn_cast_or_null<VPSingleDefRecipe>(
931-
MinMaxPhiR->getOperand(1)->getDefiningRecipe());
932-
if (!MinMaxOp)
933-
return false;
934-
935-
// The incoming value must be a min/max instrinsic.
936-
// TODO: Also handle the select variant.
937-
Intrinsic::ID ID = Intrinsic::not_intrinsic;
938-
if (auto *WideInt = dyn_cast<VPWidenIntrinsicRecipe>(MinMaxOp)) {
939-
ID = WideInt->getVectorIntrinsicID();
940-
} else {
941-
auto *RepR = dyn_cast<VPReplicateRecipe>(MinMaxOp);
942-
if (!RepR || !isa<IntrinsicInst>(RepR->getUnderlyingInstr()))
943-
return false;
944-
ID = cast<IntrinsicInst>(RepR->getUnderlyingInstr())->getIntrinsicID();
945-
}
946-
RecurKind RdxKind = RecurKind::None;
947-
switch (ID) {
948-
case Intrinsic::umax:
949-
RdxKind = RecurKind::UMax;
950-
break;
951-
case Intrinsic::umin:
952-
RdxKind = RecurKind::UMin;
953-
break;
954-
case Intrinsic::smax:
955-
RdxKind = RecurKind::SMax;
956-
break;
957-
case Intrinsic::smin:
958-
RdxKind = RecurKind::SMin;
959-
break;
960-
default:
961-
return false;
962-
}
963-
964-
// The min/max intrinsic must use the phi and itself must only be used by
965-
// the phi and a resume-phi in the scalar preheader.
966-
if (MinMaxOp->getOperand(0) != MinMaxPhiR &&
967-
MinMaxOp->getOperand(1) != MinMaxPhiR)
968-
return false;
969-
if (MinMaxPhiR->getNumUsers() != 2 ||
970-
any_of(MinMaxOp->users(), [MinMaxPhiR, &Plan](VPUser *U) {
971-
auto *Phi = dyn_cast<VPPhi>(U);
972-
return MinMaxPhiR != U &&
973-
(!Phi || Phi->getParent() != Plan.getScalarPreheader());
974-
}))
975-
return false;
928+
RecurKind RdxKind = RecurrenceDescriptor::convertFromMultiUseKind(
929+
MinMaxPhiR->getRecurrenceKind());
930+
if (RdxKind == MinMaxPhiR->getRecurrenceKind())
931+
continue;
976932

977933
// One user of MinMaxPhiR is MinMaxOp, the other users must be a compare
978934
// that's part of a FindLastIV chain.
935+
auto *MinMaxOp = cast<VPRecipeWithIRFlags>(MinMaxPhiR->getBackedgeValue());
979936
auto MinMaxUsers = to_vector(MinMaxPhiR->users());
980937
auto *Cmp = dyn_cast<VPRecipeWithIRFlags>(
981938
MinMaxUsers[0] == MinMaxOp ? MinMaxUsers[1] : MinMaxUsers[0]);

‎llvm/test/Transforms/LoopVectorize/AArch64/select-index.ll‎

Lines changed: 16 additions & 8 deletions
Original file line numberDiff line numberDiff line change
@@ -88,17 +88,19 @@ define i64 @test_vectorize_select_umin_last_idx(ptr %src, i64 %n) {
8888
; CHECK-NEXT: [[TMP15:%.*]] = call i64 @llvm.vector.reduce.smax.v2i64(<2 x i64> [[RDX_MINMAX5]])
8989
; CHECK-NEXT: [[RDX_SELECT_CMP:%.*]] = icmp ne i64 [[TMP15]], -9223372036854775808
9090
; CHECK-NEXT: [[RDX_SELECT:%.*]] = select i1 [[RDX_SELECT_CMP]], i64 [[TMP15]], i64 0
91+
; CHECK-NEXT: [[RDX_MINMAX6:%.*]] = call <2 x i64> @llvm.umin.v2i64(<2 x i64> [[TMP5]], <2 x i64> [[TMP6]])
92+
; CHECK-NEXT: [[TMP16:%.*]] = call i64 @llvm.vector.reduce.umin.v2i64(<2 x i64> [[RDX_MINMAX6]])
9193
; CHECK-NEXT: [[CMP_N:%.*]] = icmp eq i64 [[N]], [[N_VEC]]
9294
; CHECK-NEXT: br i1 [[CMP_N]], label %[[EXIT:.*]], label %[[SCALAR_PH]]
9395
; CHECK: [[SCALAR_PH]]:
9496
; CHECK-NEXT: [[BC_RESUME_VAL:%.*]] = phi i64 [ [[N_VEC]], %[[MIDDLE_BLOCK]] ], [ 0, %[[ENTRY]] ]
9597
; CHECK-NEXT: [[BC_MERGE_RDX:%.*]] = phi i64 [ [[RDX_SELECT]], %[[MIDDLE_BLOCK]] ], [ 0, %[[ENTRY]] ]
96-
; CHECK-NEXT: [[BC_MERGE_RDX6:%.*]] = phi i64 [ [[TMP10]], %[[MIDDLE_BLOCK]] ], [ 0, %[[ENTRY]] ]
98+
; CHECK-NEXT: [[BC_MERGE_RDX7:%.*]] = phi i64 [ [[TMP16]], %[[MIDDLE_BLOCK]] ], [ 0, %[[ENTRY]] ]
9799
; CHECK-NEXT: br label %[[LOOP:.*]]
98100
; CHECK: [[LOOP]]:
99101
; CHECK-NEXT: [[IV1:%.*]] = phi i64 [ [[BC_RESUME_VAL]], %[[SCALAR_PH]] ], [ [[IV_NEXT:%.*]], %[[LOOP]] ]
100102
; CHECK-NEXT: [[MIN_IDX:%.*]] = phi i64 [ [[BC_MERGE_RDX]], %[[SCALAR_PH]] ], [ [[MIN_IDX_NEXT:%.*]], %[[LOOP]] ]
101-
; CHECK-NEXT: [[MIN_VAL:%.*]] = phi i64 [ [[BC_MERGE_RDX6]], %[[SCALAR_PH]] ], [ [[MIN_VAL_NEXT:%.*]], %[[LOOP]] ]
103+
; CHECK-NEXT: [[MIN_VAL:%.*]] = phi i64 [ [[BC_MERGE_RDX7]], %[[SCALAR_PH]] ], [ [[MIN_VAL_NEXT:%.*]], %[[LOOP]] ]
102104
; CHECK-NEXT: [[GEP1:%.*]] = getelementptr i64, ptr [[SRC]], i64 [[IV1]]
103105
; CHECK-NEXT: [[L:%.*]] = load i64, ptr [[GEP1]], align 8
104106
; CHECK-NEXT: [[CMP:%.*]] = icmp uge i64 [[MIN_VAL]], [[L]]
@@ -219,17 +221,19 @@ define i64 @test_vectorize_select_smin_last_idx(ptr %src, i64 %n) {
219221
; CHECK-NEXT: [[TMP15:%.*]] = call i64 @llvm.vector.reduce.smax.v2i64(<2 x i64> [[RDX_MINMAX5]])
220222
; CHECK-NEXT: [[RDX_SELECT_CMP:%.*]] = icmp ne i64 [[TMP15]], -9223372036854775808
221223
; CHECK-NEXT: [[RDX_SELECT:%.*]] = select i1 [[RDX_SELECT_CMP]], i64 [[TMP15]], i64 0
224+
; CHECK-NEXT: [[RDX_MINMAX6:%.*]] = call <2 x i64> @llvm.smin.v2i64(<2 x i64> [[TMP5]], <2 x i64> [[TMP6]])
225+
; CHECK-NEXT: [[TMP16:%.*]] = call i64 @llvm.vector.reduce.smin.v2i64(<2 x i64> [[RDX_MINMAX6]])
222226
; CHECK-NEXT: [[CMP_N:%.*]] = icmp eq i64 [[N]], [[N_VEC]]
223227
; CHECK-NEXT: br i1 [[CMP_N]], label %[[EXIT:.*]], label %[[SCALAR_PH]]
224228
; CHECK: [[SCALAR_PH]]:
225229
; CHECK-NEXT: [[BC_RESUME_VAL:%.*]] = phi i64 [ [[N_VEC]], %[[MIDDLE_BLOCK]] ], [ 0, %[[ENTRY]] ]
226230
; CHECK-NEXT: [[BC_MERGE_RDX:%.*]] = phi i64 [ [[RDX_SELECT]], %[[MIDDLE_BLOCK]] ], [ 0, %[[ENTRY]] ]
227-
; CHECK-NEXT: [[BC_MERGE_RDX6:%.*]] = phi i64 [ [[TMP10]], %[[MIDDLE_BLOCK]] ], [ 0, %[[ENTRY]] ]
231+
; CHECK-NEXT: [[BC_MERGE_RDX7:%.*]] = phi i64 [ [[TMP16]], %[[MIDDLE_BLOCK]] ], [ 0, %[[ENTRY]] ]
228232
; CHECK-NEXT: br label %[[LOOP:.*]]
229233
; CHECK: [[LOOP]]:
230234
; CHECK-NEXT: [[IV1:%.*]] = phi i64 [ [[BC_RESUME_VAL]], %[[SCALAR_PH]] ], [ [[IV_NEXT:%.*]], %[[LOOP]] ]
231235
; CHECK-NEXT: [[MIN_IDX:%.*]] = phi i64 [ [[BC_MERGE_RDX]], %[[SCALAR_PH]] ], [ [[MIN_IDX_NEXT:%.*]], %[[LOOP]] ]
232-
; CHECK-NEXT: [[MIN_VAL:%.*]] = phi i64 [ [[BC_MERGE_RDX6]], %[[SCALAR_PH]] ], [ [[MIN_VAL_NEXT:%.*]], %[[LOOP]] ]
236+
; CHECK-NEXT: [[MIN_VAL:%.*]] = phi i64 [ [[BC_MERGE_RDX7]], %[[SCALAR_PH]] ], [ [[MIN_VAL_NEXT:%.*]], %[[LOOP]] ]
233237
; CHECK-NEXT: [[GEP1:%.*]] = getelementptr i64, ptr [[SRC]], i64 [[IV1]]
234238
; CHECK-NEXT: [[L:%.*]] = load i64, ptr [[GEP1]], align 8
235239
; CHECK-NEXT: [[CMP:%.*]] = icmp sge i64 [[MIN_VAL]], [[L]]
@@ -350,17 +354,19 @@ define i64 @test_vectorize_select_umax_last_idx(ptr %src, i64 %n) {
350354
; CHECK-NEXT: [[TMP15:%.*]] = call i64 @llvm.vector.reduce.smax.v2i64(<2 x i64> [[RDX_MINMAX5]])
351355
; CHECK-NEXT: [[RDX_SELECT_CMP:%.*]] = icmp ne i64 [[TMP15]], -9223372036854775808
352356
; CHECK-NEXT: [[RDX_SELECT:%.*]] = select i1 [[RDX_SELECT_CMP]], i64 [[TMP15]], i64 0
357+
; CHECK-NEXT: [[RDX_MINMAX6:%.*]] = call <2 x i64> @llvm.umax.v2i64(<2 x i64> [[TMP5]], <2 x i64> [[TMP6]])
358+
; CHECK-NEXT: [[TMP16:%.*]] = call i64 @llvm.vector.reduce.umax.v2i64(<2 x i64> [[RDX_MINMAX6]])
353359
; CHECK-NEXT: [[CMP_N:%.*]] = icmp eq i64 [[N]], [[N_VEC]]
354360
; CHECK-NEXT: br i1 [[CMP_N]], label %[[EXIT:.*]], label %[[SCALAR_PH]]
355361
; CHECK: [[SCALAR_PH]]:
356362
; CHECK-NEXT: [[BC_RESUME_VAL:%.*]] = phi i64 [ [[N_VEC]], %[[MIDDLE_BLOCK]] ], [ 0, %[[ENTRY]] ]
357363
; CHECK-NEXT: [[BC_MERGE_RDX:%.*]] = phi i64 [ [[RDX_SELECT]], %[[MIDDLE_BLOCK]] ], [ 0, %[[ENTRY]] ]
358-
; CHECK-NEXT: [[BC_MERGE_RDX6:%.*]] = phi i64 [ [[TMP10]], %[[MIDDLE_BLOCK]] ], [ 0, %[[ENTRY]] ]
364+
; CHECK-NEXT: [[BC_MERGE_RDX7:%.*]] = phi i64 [ [[TMP16]], %[[MIDDLE_BLOCK]] ], [ 0, %[[ENTRY]] ]
359365
; CHECK-NEXT: br label %[[LOOP:.*]]
360366
; CHECK: [[LOOP]]:
361367
; CHECK-NEXT: [[IV1:%.*]] = phi i64 [ [[BC_RESUME_VAL]], %[[SCALAR_PH]] ], [ [[IV_NEXT:%.*]], %[[LOOP]] ]
362368
; CHECK-NEXT: [[MIN_IDX:%.*]] = phi i64 [ [[BC_MERGE_RDX]], %[[SCALAR_PH]] ], [ [[MIN_IDX_NEXT:%.*]], %[[LOOP]] ]
363-
; CHECK-NEXT: [[MIN_VAL:%.*]] = phi i64 [ [[BC_MERGE_RDX6]], %[[SCALAR_PH]] ], [ [[MIN_VAL_NEXT:%.*]], %[[LOOP]] ]
369+
; CHECK-NEXT: [[MIN_VAL:%.*]] = phi i64 [ [[BC_MERGE_RDX7]], %[[SCALAR_PH]] ], [ [[MIN_VAL_NEXT:%.*]], %[[LOOP]] ]
364370
; CHECK-NEXT: [[GEP1:%.*]] = getelementptr i64, ptr [[SRC]], i64 [[IV1]]
365371
; CHECK-NEXT: [[L:%.*]] = load i64, ptr [[GEP1]], align 8
366372
; CHECK-NEXT: [[CMP:%.*]] = icmp ule i64 [[MIN_VAL]], [[L]]
@@ -481,17 +487,19 @@ define i64 @test_vectorize_select_smax_last_idx(ptr %src, i64 %n) {
481487
; CHECK-NEXT: [[TMP15:%.*]] = call i64 @llvm.vector.reduce.smax.v2i64(<2 x i64> [[RDX_MINMAX5]])
482488
; CHECK-NEXT: [[RDX_SELECT_CMP:%.*]] = icmp ne i64 [[TMP15]], -9223372036854775808
483489
; CHECK-NEXT: [[RDX_SELECT:%.*]] = select i1 [[RDX_SELECT_CMP]], i64 [[TMP15]], i64 0
490+
; CHECK-NEXT: [[RDX_MINMAX6:%.*]] = call <2 x i64> @llvm.smax.v2i64(<2 x i64> [[TMP5]], <2 x i64> [[TMP6]])
491+
; CHECK-NEXT: [[TMP16:%.*]] = call i64 @llvm.vector.reduce.smax.v2i64(<2 x i64> [[RDX_MINMAX6]])
484492
; CHECK-NEXT: [[CMP_N:%.*]] = icmp eq i64 [[N]], [[N_VEC]]
485493
; CHECK-NEXT: br i1 [[CMP_N]], label %[[EXIT:.*]], label %[[SCALAR_PH]]
486494
; CHECK: [[SCALAR_PH]]:
487495
; CHECK-NEXT: [[BC_RESUME_VAL:%.*]] = phi i64 [ [[N_VEC]], %[[MIDDLE_BLOCK]] ], [ 0, %[[ENTRY]] ]
488496
; CHECK-NEXT: [[BC_MERGE_RDX:%.*]] = phi i64 [ [[RDX_SELECT]], %[[MIDDLE_BLOCK]] ], [ 0, %[[ENTRY]] ]
489-
; CHECK-NEXT: [[BC_MERGE_RDX6:%.*]] = phi i64 [ [[TMP10]], %[[MIDDLE_BLOCK]] ], [ 0, %[[ENTRY]] ]
497+
; CHECK-NEXT: [[BC_MERGE_RDX7:%.*]] = phi i64 [ [[TMP16]], %[[MIDDLE_BLOCK]] ], [ 0, %[[ENTRY]] ]
490498
; CHECK-NEXT: br label %[[LOOP:.*]]
491499
; CHECK: [[LOOP]]:
492500
; CHECK-NEXT: [[IV1:%.*]] = phi i64 [ [[BC_RESUME_VAL]], %[[SCALAR_PH]] ], [ [[IV_NEXT:%.*]], %[[LOOP]] ]
493501
; CHECK-NEXT: [[MIN_IDX:%.*]] = phi i64 [ [[BC_MERGE_RDX]], %[[SCALAR_PH]] ], [ [[MIN_IDX_NEXT:%.*]], %[[LOOP]] ]
494-
; CHECK-NEXT: [[MIN_VAL:%.*]] = phi i64 [ [[BC_MERGE_RDX6]], %[[SCALAR_PH]] ], [ [[MIN_VAL_NEXT:%.*]], %[[LOOP]] ]
502+
; CHECK-NEXT: [[MIN_VAL:%.*]] = phi i64 [ [[BC_MERGE_RDX7]], %[[SCALAR_PH]] ], [ [[MIN_VAL_NEXT:%.*]], %[[LOOP]] ]
495503
; CHECK-NEXT: [[GEP1:%.*]] = getelementptr i64, ptr [[SRC]], i64 [[IV1]]
496504
; CHECK-NEXT: [[L:%.*]] = load i64, ptr [[GEP1]], align 8
497505
; CHECK-NEXT: [[CMP:%.*]] = icmp sle i64 [[MIN_VAL]], [[L]]

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