Use script to auto update codegen

Author: ahmednoursphinx

llvm/test/CodeGen/X86/avx512-mask-set-opt.ll

@@ -137,34 +137,43 @@ define <16 x float> @gather_lower(ptr %base, <16 x i32> %ind, i16 %mask) {
 
 ; Test case 5: v32i1 mask via bitconvert combined with dynamic condition.
 ; Ensures lower 16 lanes force the KSET1W path without folding into a shuffle.
-define <32 x i16> @mask_v32i1_lower16(<32 x i16> %a, <32 x i16> %b,
-                                      <32 x i16> %c, <32 x i16> %d) {
+define <32 x i16> @mask_v32i1_lower16(<32 x i16> %a, <32 x i16> %b, <32 x i16> %c, <32 x i16> %d) {
 ; AVX512F-LABEL: mask_v32i1_lower16:
-; AVX512F:         vextracti64x4
-; AVX512F:         vpcmpgtw
-; AVX512F:         vpternlogd
-; AVX512F:         vinserti64x4
-; AVX512F:         vpternlogq
+; AVX512F:       # %bb.0:
+; AVX512F-NEXT:    vextracti64x4 $1, %zmm3, %ymm3
+; AVX512F-NEXT:    vextracti64x4 $1, %zmm2, %ymm2
+; AVX512F-NEXT:    vpcmpgtw %ymm3, %ymm2, %ymm2
+; AVX512F-NEXT:    vpternlogd {{.*#+}} zmm3 = -1
+; AVX512F-NEXT:    vinserti64x4 $1, %ymm2, %zmm3, %zmm2
+; AVX512F-NEXT:    vpternlogq {{.*#+}} zmm0 = zmm1 ^ (zmm2 & (zmm0 ^ zmm1))
+; AVX512F-NEXT:    retq
 ;
 ; AVX512DQ-LABEL: mask_v32i1_lower16:
-; AVX512DQ:         vextracti64x4
-; AVX512DQ:         vpcmpgtw
-; AVX512DQ:         vpternlogd
-; AVX512DQ:         vinserti64x4
-; AVX512DQ:         vpternlogq
+; AVX512DQ:       # %bb.0:
+; AVX512DQ-NEXT:    vextracti64x4 $1, %zmm3, %ymm3
+; AVX512DQ-NEXT:    vextracti64x4 $1, %zmm2, %ymm2
+; AVX512DQ-NEXT:    vpcmpgtw %ymm3, %ymm2, %ymm2
+; AVX512DQ-NEXT:    vpternlogd {{.*#+}} zmm3 = -1
+; AVX512DQ-NEXT:    vinserti64x4 $1, %ymm2, %zmm3, %zmm2
+; AVX512DQ-NEXT:    vpternlogq {{.*#+}} zmm0 = zmm1 ^ (zmm2 & (zmm0 ^ zmm1))
+; AVX512DQ-NEXT:    retq
 ;
 ; AVX512BW-LABEL: mask_v32i1_lower16:
-; AVX512BW:         movl $65535, %eax
-; AVX512BW:         kmovd %eax, %k0
-; AVX512BW:         vpcmpgtw %zmm3, %zmm2, %k1
-; AVX512BW:         kord %k0, %k1, %k1
-; AVX512BW:         vpblendmw %zmm0, %zmm1, %zmm0 {%k1}
+; AVX512BW:       # %bb.0:
+; AVX512BW-NEXT:    movl $65535, %eax # imm = 0xFFFF
+; AVX512BW-NEXT:    kmovd %eax, %k0
+; AVX512BW-NEXT:    vpcmpgtw %zmm3, %zmm2, %k1
+; AVX512BW-NEXT:    kord %k0, %k1, %k1
+; AVX512BW-NEXT:    vpblendmw %zmm0, %zmm1, %zmm0 {%k1}
+; AVX512BW-NEXT:    retq
 ;
 ; AVX512DQBW-LABEL: mask_v32i1_lower16:
-; AVX512DQBW:         kxnorw %k0, %k0, %k0
-; AVX512DQBW:         vpcmpgtw %zmm3, %zmm2, %k1
-; AVX512DQBW:         kord %k0, %k1, %k1
-; AVX512DQBW:         vpblendmw %zmm0, %zmm1, %zmm0 {%k1}
+; AVX512DQBW:       # %bb.0:
+; AVX512DQBW-NEXT:    kxnorw %k0, %k0, %k0
+; AVX512DQBW-NEXT:    vpcmpgtw %zmm3, %zmm2, %k1
+; AVX512DQBW-NEXT:    kord %k0, %k1, %k1
+; AVX512DQBW-NEXT:    vpblendmw %zmm0, %zmm1, %zmm0 {%k1}
+; AVX512DQBW-NEXT:    retq
   %mask0 = bitcast i32 65535 to <32 x i1>
   %mask1 = icmp sgt <32 x i16> %c, %d
   %mask = or <32 x i1> %mask0, %mask1
@@ -174,34 +183,43 @@ define <32 x i16> @mask_v32i1_lower16(<32 x i16> %a, <32 x i16> %b,
 
 ; Test case 6: v64i1 mask via bitconvert combined with dynamic condition.
 ; Verifies the KSET1D submask pattern survives past SelectionDAG combines.
-define <64 x i8> @mask_v64i1_lower32(<64 x i8> %a, <64 x i8> %b,
-                                     <64 x i8> %c, <64 x i8> %d) {
+define <64 x i8> @mask_v64i1_lower32(<64 x i8> %a, <64 x i8> %b, <64 x i8> %c, <64 x i8> %d) {
 ; AVX512F-LABEL: mask_v64i1_lower32:
-; AVX512F:         vextracti64x4
-; AVX512F:         vpcmpgtb
-; AVX512F:         vpternlogd
-; AVX512F:         vinserti64x4
-; AVX512F:         vpternlogq
+; AVX512F:       # %bb.0:
+; AVX512F-NEXT:    vextracti64x4 $1, %zmm3, %ymm3
+; AVX512F-NEXT:    vextracti64x4 $1, %zmm2, %ymm2
+; AVX512F-NEXT:    vpcmpgtb %ymm3, %ymm2, %ymm2
+; AVX512F-NEXT:    vpternlogd {{.*#+}} zmm3 = -1
+; AVX512F-NEXT:    vinserti64x4 $1, %ymm2, %zmm3, %zmm2
+; AVX512F-NEXT:    vpternlogq {{.*#+}} zmm0 = zmm1 ^ (zmm2 & (zmm0 ^ zmm1))
+; AVX512F-NEXT:    retq
 ;
 ; AVX512DQ-LABEL: mask_v64i1_lower32:
-; AVX512DQ:         vextracti64x4
-; AVX512DQ:         vpcmpgtb
-; AVX512DQ:         vpternlogd
-; AVX512DQ:         vinserti64x4
-; AVX512DQ:         vpternlogq
+; AVX512DQ:       # %bb.0:
+; AVX512DQ-NEXT:    vextracti64x4 $1, %zmm3, %ymm3
+; AVX512DQ-NEXT:    vextracti64x4 $1, %zmm2, %ymm2
+; AVX512DQ-NEXT:    vpcmpgtb %ymm3, %ymm2, %ymm2
+; AVX512DQ-NEXT:    vpternlogd {{.*#+}} zmm3 = -1
+; AVX512DQ-NEXT:    vinserti64x4 $1, %ymm2, %zmm3, %zmm2
+; AVX512DQ-NEXT:    vpternlogq {{.*#+}} zmm0 = zmm1 ^ (zmm2 & (zmm0 ^ zmm1))
+; AVX512DQ-NEXT:    retq
 ;
 ; AVX512BW-LABEL: mask_v64i1_lower32:
-; AVX512BW:         movl $4294967295, %eax
-; AVX512BW:         kmovq %rax, %k0
-; AVX512BW:         vpcmpgtb %zmm3, %zmm2, %k1
-; AVX512BW:         korq %k0, %k1, %k1
-; AVX512BW:         vpblendmb %zmm0, %zmm1, %zmm0 {%k1}
+; AVX512BW:       # %bb.0:
+; AVX512BW-NEXT:    movl $4294967295, %eax # imm = 0xFFFFFFFF
+; AVX512BW-NEXT:    kmovq %rax, %k0
+; AVX512BW-NEXT:    vpcmpgtb %zmm3, %zmm2, %k1
+; AVX512BW-NEXT:    korq %k0, %k1, %k1
+; AVX512BW-NEXT:    vpblendmb %zmm0, %zmm1, %zmm0 {%k1}
+; AVX512BW-NEXT:    retq
 ;
 ; AVX512DQBW-LABEL: mask_v64i1_lower32:
-; AVX512DQBW:         kxnord %k0, %k0, %k0
-; AVX512DQBW:         vpcmpgtb %zmm3, %zmm2, %k1
-; AVX512DQBW:         korq %k0, %k1, %k1
-; AVX512DQBW:         vpblendmb %zmm0, %zmm1, %zmm0 {%k1}
+; AVX512DQBW:       # %bb.0:
+; AVX512DQBW-NEXT:    kxnord %k0, %k0, %k0
+; AVX512DQBW-NEXT:    vpcmpgtb %zmm3, %zmm2, %k1
+; AVX512DQBW-NEXT:    korq %k0, %k1, %k1
+; AVX512DQBW-NEXT:    vpblendmb %zmm0, %zmm1, %zmm0 {%k1}
+; AVX512DQBW-NEXT:    retq
   %mask0 = bitcast i64 4294967295 to <64 x i1>
   %mask1 = icmp sgt <64 x i8> %c, %d
   %mask = or <64 x i1> %mask0, %mask1