code clean up

Author: YixingZhang007

llvm/lib/Target/SPIRV/MCTargetDesc/SPIRVInstPrinter.cpp

@@ -52,8 +52,8 @@ void SPIRVInstPrinter::printOpConstantVarOps(const MCInst *MI,
   const unsigned Opcode = MI->getOpcode();
 
   // We support up to 1024 bits for integers, and 64 bits for floats
-  assert(((NumVarOps <= 32 && Opcode == SPIRV::OpConstantI) || 
-          (NumVarOps <= 2 && Opcode == SPIRV::OpConstantF)) && 
+  assert(((NumVarOps <= 32 && Opcode == SPIRV::OpConstantI) ||
+          (NumVarOps <= 2 && Opcode == SPIRV::OpConstantF)) &&
          "Unsupported number of operands for constant");
 
   O << ' ';

llvm/lib/Target/SPIRV/SPIRVGlobalRegistry.cpp

@@ -343,7 +343,8 @@ Register SPIRVGlobalRegistry::createConstFP(const ConstantFP *CF,
   return Res;
 }
 
-Register SPIRVGlobalRegistry::getOrCreateConstInt(const APInt Val, MachineInstr &I,
+Register SPIRVGlobalRegistry::getOrCreateConstInt(const APInt Val,
+                                                  MachineInstr &I,
                                                   SPIRVType *SpvType,
                                                   const SPIRVInstrInfo &TII,
                                                   bool ZeroAsNull) {
@@ -361,7 +362,7 @@ Register SPIRVGlobalRegistry::getOrCreateConstInt(uint64_t Val, MachineInstr &I,
                                                   const SPIRVInstrInfo &TII,
                                                   bool ZeroAsNull) {
   const IntegerType *Ty = cast<IntegerType>(getTypeForSPIRVType(SpvType));
-  ConstantInt *const CI = ConstantInt::get(const_cast<IntegerType *>(Ty), Val);
+  auto *const CI = ConstantInt::get(const_cast<IntegerType *>(Ty), Val);
   const MachineInstr *MI = findMI(CI, CurMF);
   if (MI && (MI->getOpcode() == SPIRV::OpConstantNull ||
              MI->getOpcode() == SPIRV::OpConstantI))
@@ -388,7 +389,7 @@ Register SPIRVGlobalRegistry::createConstInt(const Constant *CA,
         if (BitWidth == 1) {
           MIB = MIRBuilder
                     .buildInstr(CA->isZeroValue() ? SPIRV::OpConstantFalse
-                                             : SPIRV::OpConstantTrue)
+                                                  : SPIRV::OpConstantTrue)
                     .addDef(Res)
                     .addUse(getSPIRVTypeID(SpvType));
         } else if (!CA->isZeroValue() || !ZeroAsNull) {

llvm/lib/Target/SPIRV/SPIRVGlobalRegistry.h

@@ -515,8 +515,8 @@ class SPIRVGlobalRegistry : public SPIRVIRMapping {
   Register buildConstantInt(uint64_t Val, MachineIRBuilder &MIRBuilder,
                             SPIRVType *SpvType, bool EmitIR,
                             bool ZeroAsNull = true);
-  Register getOrCreateConstInt(APInt Val, MachineInstr &I,
-                               SPIRVType *SpvType, const SPIRVInstrInfo &TII,
+  Register getOrCreateConstInt(APInt Val, MachineInstr &I, SPIRVType *SpvType,
+                               const SPIRVInstrInfo &TII,
                                bool ZeroAsNull = true);
   Register getOrCreateConstInt(uint64_t Val, MachineInstr &I,
                                SPIRVType *SpvType, const SPIRVInstrInfo &TII,

llvm/lib/Target/SPIRV/SPIRVInstructionSelector.cpp

@@ -2939,12 +2939,12 @@ bool SPIRVInstructionSelector::selectConst(Register ResVReg,
     Reg = GR.getOrCreateConstFP(I.getOperand(1).getFPImm()->getValue(), I,
                                 ResType, TII, !STI.isShader());
   } else {
-    if(GR.getScalarOrVectorBitWidth(ResType) <= 64) {
+    if (GR.getScalarOrVectorBitWidth(ResType) <= 64) {
       Reg = GR.getOrCreateConstInt(I.getOperand(1).getCImm()->getZExtValue(), I,
-                                 ResType, TII, !STI.isShader());
+                                   ResType, TII, !STI.isShader());
     } else {
       Reg = GR.getOrCreateConstInt(I.getOperand(1).getCImm()->getValue(), I,
-                                 ResType, TII, !STI.isShader());
+                                   ResType, TII, !STI.isShader());
     }
   }
   return Reg == ResVReg ? true : BuildCOPY(ResVReg, Reg, I);