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[NFC][MC][ARM] Rearrange decode functions in ARM disassembler (#154988)
Move `tryAddingSymbolicOperand` and `tryAddingPcLoadReferenceComment` to before including the generated disassembler code. This is in preparation for rearranging the decoder functions to eliminate forward declarations.
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llvm/lib/Target/ARM/Disassembler/ARMDisassembler.cpp

Lines changed: 36 additions & 36 deletions
Original file line numberDiff line numberDiff line change
@@ -692,6 +692,42 @@ static DecodeStatus DecodeLazyLoadStoreMul(MCInst &Inst, unsigned Insn,
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uint64_t Address,
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const MCDisassembler *Decoder);
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/// tryAddingSymbolicOperand - trys to add a symbolic operand in place of the
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/// immediate Value in the MCInst. The immediate Value has had any PC
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/// adjustment made by the caller. If the instruction is a branch instruction
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/// then isBranch is true, else false. If the getOpInfo() function was set as
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/// part of the setupForSymbolicDisassembly() call then that function is called
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/// to get any symbolic information at the Address for this instruction. If
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/// that returns non-zero then the symbolic information it returns is used to
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/// create an MCExpr and that is added as an operand to the MCInst. If
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/// getOpInfo() returns zero and isBranch is true then a symbol look up for
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/// Value is done and if a symbol is found an MCExpr is created with that, else
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/// an MCExpr with Value is created. This function returns true if it adds an
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/// operand to the MCInst and false otherwise.
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static bool tryAddingSymbolicOperand(uint64_t Address, int32_t Value,
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bool isBranch, uint64_t InstSize,
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MCInst &MI,
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const MCDisassembler *Decoder) {
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// FIXME: Does it make sense for value to be negative?
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return Decoder->tryAddingSymbolicOperand(MI, (uint32_t)Value, Address,
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isBranch, /*Offset=*/0, /*OpSize=*/0,
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InstSize);
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}
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/// tryAddingPcLoadReferenceComment - trys to add a comment as to what is being
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/// referenced by a load instruction with the base register that is the Pc.
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/// These can often be values in a literal pool near the Address of the
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/// instruction. The Address of the instruction and its immediate Value are
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/// used as a possible literal pool entry. The SymbolLookUp call back will
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/// return the name of a symbol referenced by the literal pool's entry if
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/// the referenced address is that of a symbol. Or it will return a pointer to
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/// a literal 'C' string if the referenced address of the literal pool's entry
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/// is an address into a section with 'C' string literals.
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static void tryAddingPcLoadReferenceComment(uint64_t Address, int Value,
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const MCDisassembler *Decoder) {
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Decoder->tryAddingPcLoadReferenceComment(Value, Address);
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}
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#include "ARMGenDisassemblerTables.inc"
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static MCDisassembler *createARMDisassembler(const Target &T,
@@ -832,42 +868,6 @@ DecodeStatus ARMDisassembler::getARMInstruction(MCInst &MI, uint64_t &Size,
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return MCDisassembler::Fail;
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}
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/// tryAddingSymbolicOperand - trys to add a symbolic operand in place of the
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/// immediate Value in the MCInst. The immediate Value has had any PC
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/// adjustment made by the caller. If the instruction is a branch instruction
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/// then isBranch is true, else false. If the getOpInfo() function was set as
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/// part of the setupForSymbolicDisassembly() call then that function is called
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/// to get any symbolic information at the Address for this instruction. If
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/// that returns non-zero then the symbolic information it returns is used to
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/// create an MCExpr and that is added as an operand to the MCInst. If
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/// getOpInfo() returns zero and isBranch is true then a symbol look up for
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/// Value is done and if a symbol is found an MCExpr is created with that, else
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/// an MCExpr with Value is created. This function returns true if it adds an
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/// operand to the MCInst and false otherwise.
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static bool tryAddingSymbolicOperand(uint64_t Address, int32_t Value,
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bool isBranch, uint64_t InstSize,
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MCInst &MI,
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const MCDisassembler *Decoder) {
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// FIXME: Does it make sense for value to be negative?
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return Decoder->tryAddingSymbolicOperand(MI, (uint32_t)Value, Address,
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isBranch, /*Offset=*/0, /*OpSize=*/0,
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InstSize);
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}
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/// tryAddingPcLoadReferenceComment - trys to add a comment as to what is being
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/// referenced by a load instruction with the base register that is the Pc.
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/// These can often be values in a literal pool near the Address of the
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/// instruction. The Address of the instruction and its immediate Value are
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/// used as a possible literal pool entry. The SymbolLookUp call back will
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/// return the name of a symbol referenced by the literal pool's entry if
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/// the referenced address is that of a symbol. Or it will return a pointer to
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/// a literal 'C' string if the referenced address of the literal pool's entry
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/// is an address into a section with 'C' string literals.
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static void tryAddingPcLoadReferenceComment(uint64_t Address, int Value,
867-
const MCDisassembler *Decoder) {
868-
Decoder->tryAddingPcLoadReferenceComment(Value, Address);
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}
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// Thumb1 instructions don't have explicit S bits. Rather, they
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// implicitly set CPSR. Since it's not represented in the encoding, the
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// auto-generated decoder won't inject the CPSR operand. We need to fix

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