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ElvisWang123ElvisWang123
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!Fixup, implement Cmp instruction costs in VPInstruction::computeCost.
1 parent 7457c90 commit 9c5e12e

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9 files changed

+60
-341
lines changed

9 files changed

+60
-341
lines changed

‎llvm/lib/Transforms/Vectorize/VPlanRecipes.cpp‎

Lines changed: 14 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -1039,6 +1039,20 @@ InstructionCost VPInstruction::computeCost(ElementCount VF,
10391039
return Ctx.TTI.getArithmeticInstrCost(Instruction::Xor, RetTy,
10401040
Ctx.CostKind);
10411041
}
1042+
case Instruction::ICmp:
1043+
case Instruction::FCmp: {
1044+
Instruction *CtxI = dyn_cast_or_null<Instruction>(getUnderlyingValue());
1045+
Type *SrcTy = Ctx.Types.inferScalarType(getOperand(0));
1046+
Type *RetTy = Ctx.Types.inferScalarType(this);
1047+
if (!vputils::onlyFirstLaneUsed(this)) {
1048+
SrcTy = toVectorTy(SrcTy, VF);
1049+
RetTy = toVectorTy(RetTy, VF);
1050+
}
1051+
return Ctx.TTI.getCmpSelInstrCost(Opcode, SrcTy, RetTy, getPredicate(),
1052+
Ctx.CostKind,
1053+
{TTI::OK_AnyValue, TTI::OP_None},
1054+
{TTI::OK_AnyValue, TTI::OP_None}, CtxI);
1055+
}
10421056
case VPInstruction::ExtractPenultimateElement:
10431057
if (VF == ElementCount::getScalable(1))
10441058
return InstructionCost::getInvalid();

‎llvm/test/Transforms/LoopVectorize/AArch64/early_exit_costs.ll‎

Lines changed: 3 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -92,11 +92,9 @@ loop.end:
9292

9393
define i64 @vectorization_not_profitable_due_to_trunc(ptr dereferenceable(800) %src) {
9494
; CHECK-LABEL: LV: Checking a loop in 'vectorization_not_profitable_due_to_trunc'
95-
; CHECK: Calculating cost of work in exit block vector.early.exit:
96-
; CHECK-NEXT: Cost of 6 for VF 2: EMIT vp<{{.*}}> = first-active-lane ir<{{.*}}>
97-
; CHECK-NEXT: Cost of 2 for VF 2: EMIT vp<{{.*}}> = extract-lane vp<{{.*}}>, ir<{{.*}}>
98-
; CHECK: LV: Minimum required TC for runtime checks to be profitable:28
99-
; CHECK: LV: Found a vectorizable loop (2)
95+
; CHECK: LV: Selecting VF: 1.
96+
; CHECK-NEXT: Calculating cost of work in exit block vector.early.exit:
97+
; CHECK-NEXT: LV: Vectorization is possible but not beneficial.
10098
entry:
10199
br label %loop.header
102100

‎llvm/test/Transforms/LoopVectorize/X86/constant-fold.ll‎

Lines changed: 10 additions & 114 deletions
Original file line numberDiff line numberDiff line change
@@ -62,75 +62,23 @@ bb3:
6262
define void @redundant_or_1(ptr %dst, i1 %c.0, i1 %c.1) {
6363
; CHECK-LABEL: @redundant_or_1(
6464
; CHECK-NEXT: entry:
65-
; CHECK-NEXT: br i1 false, label [[SCALAR_PH:%.*]], label [[VECTOR_PH:%.*]]
66-
; CHECK: vector.ph:
67-
; CHECK-NEXT: [[BROADCAST_SPLATINSERT:%.*]] = insertelement <4 x i1> poison, i1 [[C_0:%.*]], i64 0
68-
; CHECK-NEXT: [[BROADCAST_SPLAT:%.*]] = shufflevector <4 x i1> [[BROADCAST_SPLATINSERT]], <4 x i1> poison, <4 x i32> zeroinitializer
69-
; CHECK-NEXT: [[TMP0:%.*]] = xor <4 x i1> [[BROADCAST_SPLAT]], splat (i1 true)
70-
; CHECK-NEXT: [[BROADCAST_SPLATINSERT1:%.*]] = insertelement <4 x i1> poison, i1 [[C_1:%.*]], i64 0
71-
; CHECK-NEXT: [[BROADCAST_SPLAT2:%.*]] = shufflevector <4 x i1> [[BROADCAST_SPLATINSERT1]], <4 x i1> poison, <4 x i32> zeroinitializer
72-
; CHECK-NEXT: br label [[VECTOR_BODY:%.*]]
73-
; CHECK: vector.body:
74-
; CHECK-NEXT: [[INDEX:%.*]] = phi i32 [ 0, [[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], [[PRED_STORE_CONTINUE8:%.*]] ]
75-
; CHECK-NEXT: [[VEC_IND:%.*]] = phi <4 x i8> [ <i8 0, i8 1, i8 2, i8 3>, [[VECTOR_PH]] ], [ [[VEC_IND_NEXT:%.*]], [[PRED_STORE_CONTINUE8]] ]
76-
; CHECK-NEXT: [[TMP1:%.*]] = icmp ule <4 x i8> [[VEC_IND]], splat (i8 2)
77-
; CHECK-NEXT: [[TMP2:%.*]] = select <4 x i1> [[TMP1]], <4 x i1> [[TMP0]], <4 x i1> zeroinitializer
78-
; CHECK-NEXT: [[TMP5:%.*]] = select <4 x i1> [[TMP2]], <4 x i1> [[BROADCAST_SPLAT2]], <4 x i1> zeroinitializer
79-
; CHECK-NEXT: [[TMP6:%.*]] = extractelement <4 x i1> [[TMP5]], i32 0
80-
; CHECK-NEXT: br i1 [[TMP6]], label [[PRED_STORE_IF:%.*]], label [[PRED_STORE_CONTINUE:%.*]]
81-
; CHECK: pred.store.if:
82-
; CHECK-NEXT: [[TMP7:%.*]] = add i32 [[INDEX]], 0
83-
; CHECK-NEXT: [[TMP8:%.*]] = getelementptr inbounds i32, ptr [[DST:%.*]], i32 [[TMP7]]
84-
; CHECK-NEXT: store i32 0, ptr [[TMP8]], align 4
85-
; CHECK-NEXT: br label [[PRED_STORE_CONTINUE]]
86-
; CHECK: pred.store.continue:
87-
; CHECK-NEXT: [[TMP9:%.*]] = extractelement <4 x i1> [[TMP5]], i32 1
88-
; CHECK-NEXT: br i1 [[TMP9]], label [[PRED_STORE_IF3:%.*]], label [[PRED_STORE_CONTINUE4:%.*]]
89-
; CHECK: pred.store.if3:
90-
; CHECK-NEXT: [[TMP10:%.*]] = add i32 [[INDEX]], 1
91-
; CHECK-NEXT: [[TMP11:%.*]] = getelementptr inbounds i32, ptr [[DST]], i32 [[TMP10]]
92-
; CHECK-NEXT: store i32 0, ptr [[TMP11]], align 4
93-
; CHECK-NEXT: br label [[PRED_STORE_CONTINUE4]]
94-
; CHECK: pred.store.continue4:
95-
; CHECK-NEXT: [[TMP12:%.*]] = extractelement <4 x i1> [[TMP5]], i32 2
96-
; CHECK-NEXT: br i1 [[TMP12]], label [[PRED_STORE_IF5:%.*]], label [[PRED_STORE_CONTINUE6:%.*]]
97-
; CHECK: pred.store.if5:
98-
; CHECK-NEXT: [[TMP13:%.*]] = add i32 [[INDEX]], 2
99-
; CHECK-NEXT: [[TMP14:%.*]] = getelementptr inbounds i32, ptr [[DST]], i32 [[TMP13]]
100-
; CHECK-NEXT: store i32 0, ptr [[TMP14]], align 4
101-
; CHECK-NEXT: br label [[PRED_STORE_CONTINUE6]]
102-
; CHECK: pred.store.continue6:
103-
; CHECK-NEXT: [[TMP15:%.*]] = extractelement <4 x i1> [[TMP5]], i32 3
104-
; CHECK-NEXT: br i1 [[TMP15]], label [[PRED_STORE_IF7:%.*]], label [[PRED_STORE_CONTINUE8]]
105-
; CHECK: pred.store.if7:
106-
; CHECK-NEXT: [[TMP16:%.*]] = add i32 [[INDEX]], 3
107-
; CHECK-NEXT: [[TMP17:%.*]] = getelementptr inbounds i32, ptr [[DST]], i32 [[TMP16]]
108-
; CHECK-NEXT: store i32 0, ptr [[TMP17]], align 4
109-
; CHECK-NEXT: br label [[PRED_STORE_CONTINUE8]]
110-
; CHECK: pred.store.continue8:
111-
; CHECK-NEXT: [[INDEX_NEXT]] = add nuw i32 [[INDEX]], 4
112-
; CHECK-NEXT: [[VEC_IND_NEXT]] = add <4 x i8> [[VEC_IND]], splat (i8 4)
113-
; CHECK-NEXT: br i1 true, label [[MIDDLE_BLOCK:%.*]], label [[VECTOR_BODY]], !llvm.loop [[LOOP3:![0-9]+]]
114-
; CHECK: middle.block:
115-
; CHECK-NEXT: br label [[EXIT:%.*]]
116-
; CHECK: scalar.ph:
11765
; CHECK-NEXT: br label [[LOOP_HEADER:%.*]]
11866
; CHECK: loop.header:
119-
; CHECK-NEXT: [[IV:%.*]] = phi i32 [ 0, [[SCALAR_PH]] ], [ [[IV_NEXT:%.*]], [[LOOP_LATCH:%.*]] ]
120-
; CHECK-NEXT: br i1 [[C_0]], label [[LOOP_LATCH]], label [[THEN_1:%.*]]
67+
; CHECK-NEXT: [[IV:%.*]] = phi i32 [ 0, [[SCALAR_PH:%.*]] ], [ [[IV_NEXT:%.*]], [[LOOP_LATCH:%.*]] ]
68+
; CHECK-NEXT: br i1 [[C_0:%.*]], label [[LOOP_LATCH]], label [[THEN_1:%.*]]
12169
; CHECK: then.1:
12270
; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[IV]], 2
12371
; CHECK-NEXT: [[OR:%.*]] = or i1 [[CMP]], true
124-
; CHECK-NEXT: [[COND:%.*]] = select i1 [[OR]], i1 [[C_1]], i1 false
72+
; CHECK-NEXT: [[COND:%.*]] = select i1 [[OR]], i1 [[C_1:%.*]], i1 false
12573
; CHECK-NEXT: br i1 [[COND]], label [[THEN_2:%.*]], label [[LOOP_LATCH]]
12674
; CHECK: then.2:
127-
; CHECK-NEXT: [[GEP:%.*]] = getelementptr inbounds i32, ptr [[DST]], i32 [[IV]]
75+
; CHECK-NEXT: [[GEP:%.*]] = getelementptr inbounds i32, ptr [[DST:%.*]], i32 [[IV]]
12876
; CHECK-NEXT: store i32 0, ptr [[GEP]], align 4
12977
; CHECK-NEXT: br label [[LOOP_LATCH]]
13078
; CHECK: loop.latch:
13179
; CHECK-NEXT: [[IV_NEXT]] = add nuw nsw i32 [[IV]], 1
13280
; CHECK-NEXT: [[EC:%.*]] = icmp eq i32 [[IV_NEXT]], 3
133-
; CHECK-NEXT: br i1 [[EC]], label [[EXIT]], label [[LOOP_HEADER]], !llvm.loop [[LOOP4:![0-9]+]]
81+
; CHECK-NEXT: br i1 [[EC]], label [[EXIT:%.*]], label [[LOOP_HEADER]]
13482
; CHECK: exit:
13583
; CHECK-NEXT: ret void
13684
;
@@ -164,75 +112,23 @@ exit:
164112
define void @redundant_or_2(ptr %dst, i1 %c.0, i1 %c.1) {
165113
; CHECK-LABEL: @redundant_or_2(
166114
; CHECK-NEXT: entry:
167-
; CHECK-NEXT: br i1 false, label [[SCALAR_PH:%.*]], label [[VECTOR_PH:%.*]]
168-
; CHECK: vector.ph:
169-
; CHECK-NEXT: [[BROADCAST_SPLATINSERT:%.*]] = insertelement <4 x i1> poison, i1 [[C_1:%.*]], i64 0
170-
; CHECK-NEXT: [[BROADCAST_SPLAT:%.*]] = shufflevector <4 x i1> [[BROADCAST_SPLATINSERT]], <4 x i1> poison, <4 x i32> zeroinitializer
171-
; CHECK-NEXT: [[TMP0:%.*]] = xor <4 x i1> [[BROADCAST_SPLAT]], splat (i1 true)
172-
; CHECK-NEXT: [[BROADCAST_SPLATINSERT1:%.*]] = insertelement <4 x i1> poison, i1 [[C_0:%.*]], i64 0
173-
; CHECK-NEXT: [[BROADCAST_SPLAT2:%.*]] = shufflevector <4 x i1> [[BROADCAST_SPLATINSERT1]], <4 x i1> poison, <4 x i32> zeroinitializer
174-
; CHECK-NEXT: br label [[VECTOR_BODY:%.*]]
175-
; CHECK: vector.body:
176-
; CHECK-NEXT: [[INDEX:%.*]] = phi i32 [ 0, [[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], [[PRED_STORE_CONTINUE8:%.*]] ]
177-
; CHECK-NEXT: [[VEC_IND:%.*]] = phi <4 x i8> [ <i8 0, i8 1, i8 2, i8 3>, [[VECTOR_PH]] ], [ [[VEC_IND_NEXT:%.*]], [[PRED_STORE_CONTINUE8]] ]
178-
; CHECK-NEXT: [[TMP2:%.*]] = icmp ule <4 x i8> [[VEC_IND]], splat (i8 2)
179-
; CHECK-NEXT: [[TMP3:%.*]] = select <4 x i1> [[TMP2]], <4 x i1> [[TMP0]], <4 x i1> zeroinitializer
180-
; CHECK-NEXT: [[TMP4:%.*]] = select <4 x i1> [[TMP3]], <4 x i1> [[BROADCAST_SPLAT2]], <4 x i1> zeroinitializer
181-
; CHECK-NEXT: [[TMP5:%.*]] = extractelement <4 x i1> [[TMP4]], i32 0
182-
; CHECK-NEXT: br i1 [[TMP5]], label [[PRED_STORE_IF:%.*]], label [[PRED_STORE_CONTINUE:%.*]]
183-
; CHECK: pred.store.if:
184-
; CHECK-NEXT: [[TMP6:%.*]] = add i32 [[INDEX]], 0
185-
; CHECK-NEXT: [[TMP7:%.*]] = getelementptr inbounds i32, ptr [[DST:%.*]], i32 [[TMP6]]
186-
; CHECK-NEXT: store i32 0, ptr [[TMP7]], align 4
187-
; CHECK-NEXT: br label [[PRED_STORE_CONTINUE]]
188-
; CHECK: pred.store.continue:
189-
; CHECK-NEXT: [[TMP8:%.*]] = extractelement <4 x i1> [[TMP4]], i32 1
190-
; CHECK-NEXT: br i1 [[TMP8]], label [[PRED_STORE_IF3:%.*]], label [[PRED_STORE_CONTINUE4:%.*]]
191-
; CHECK: pred.store.if3:
192-
; CHECK-NEXT: [[TMP9:%.*]] = add i32 [[INDEX]], 1
193-
; CHECK-NEXT: [[TMP10:%.*]] = getelementptr inbounds i32, ptr [[DST]], i32 [[TMP9]]
194-
; CHECK-NEXT: store i32 0, ptr [[TMP10]], align 4
195-
; CHECK-NEXT: br label [[PRED_STORE_CONTINUE4]]
196-
; CHECK: pred.store.continue4:
197-
; CHECK-NEXT: [[TMP11:%.*]] = extractelement <4 x i1> [[TMP4]], i32 2
198-
; CHECK-NEXT: br i1 [[TMP11]], label [[PRED_STORE_IF5:%.*]], label [[PRED_STORE_CONTINUE6:%.*]]
199-
; CHECK: pred.store.if5:
200-
; CHECK-NEXT: [[TMP12:%.*]] = add i32 [[INDEX]], 2
201-
; CHECK-NEXT: [[TMP13:%.*]] = getelementptr inbounds i32, ptr [[DST]], i32 [[TMP12]]
202-
; CHECK-NEXT: store i32 0, ptr [[TMP13]], align 4
203-
; CHECK-NEXT: br label [[PRED_STORE_CONTINUE6]]
204-
; CHECK: pred.store.continue6:
205-
; CHECK-NEXT: [[TMP14:%.*]] = extractelement <4 x i1> [[TMP4]], i32 3
206-
; CHECK-NEXT: br i1 [[TMP14]], label [[PRED_STORE_IF7:%.*]], label [[PRED_STORE_CONTINUE8]]
207-
; CHECK: pred.store.if7:
208-
; CHECK-NEXT: [[TMP15:%.*]] = add i32 [[INDEX]], 3
209-
; CHECK-NEXT: [[TMP16:%.*]] = getelementptr inbounds i32, ptr [[DST]], i32 [[TMP15]]
210-
; CHECK-NEXT: store i32 0, ptr [[TMP16]], align 4
211-
; CHECK-NEXT: br label [[PRED_STORE_CONTINUE8]]
212-
; CHECK: pred.store.continue8:
213-
; CHECK-NEXT: [[INDEX_NEXT]] = add nuw i32 [[INDEX]], 4
214-
; CHECK-NEXT: [[VEC_IND_NEXT]] = add <4 x i8> [[VEC_IND]], splat (i8 4)
215-
; CHECK-NEXT: br i1 true, label [[MIDDLE_BLOCK:%.*]], label [[VECTOR_BODY]], !llvm.loop [[LOOP5:![0-9]+]]
216-
; CHECK: middle.block:
217-
; CHECK-NEXT: br label [[EXIT:%.*]]
218-
; CHECK: scalar.ph:
219115
; CHECK-NEXT: br label [[LOOP_HEADER:%.*]]
220116
; CHECK: loop.header:
221-
; CHECK-NEXT: [[IV:%.*]] = phi i32 [ 0, [[SCALAR_PH]] ], [ [[IV_NEXT:%.*]], [[LOOP_LATCH:%.*]] ]
222-
; CHECK-NEXT: br i1 [[C_1]], label [[LOOP_LATCH]], label [[THEN_1:%.*]]
117+
; CHECK-NEXT: [[IV:%.*]] = phi i32 [ 0, [[SCALAR_PH:%.*]] ], [ [[IV_NEXT:%.*]], [[LOOP_LATCH:%.*]] ]
118+
; CHECK-NEXT: br i1 [[C_1:%.*]], label [[LOOP_LATCH]], label [[THEN_1:%.*]]
223119
; CHECK: then.1:
224120
; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[IV]], 2
225121
; CHECK-NEXT: [[OR:%.*]] = or i1 true, [[CMP]]
226-
; CHECK-NEXT: [[COND:%.*]] = select i1 [[OR]], i1 [[C_0]], i1 false
122+
; CHECK-NEXT: [[COND:%.*]] = select i1 [[OR]], i1 [[C_0:%.*]], i1 false
227123
; CHECK-NEXT: br i1 [[COND]], label [[THEN_2:%.*]], label [[LOOP_LATCH]]
228124
; CHECK: then.2:
229-
; CHECK-NEXT: [[GEP:%.*]] = getelementptr inbounds i32, ptr [[DST]], i32 [[IV]]
125+
; CHECK-NEXT: [[GEP:%.*]] = getelementptr inbounds i32, ptr [[DST:%.*]], i32 [[IV]]
230126
; CHECK-NEXT: store i32 0, ptr [[GEP]], align 4
231127
; CHECK-NEXT: br label [[LOOP_LATCH]]
232128
; CHECK: loop.latch:
233129
; CHECK-NEXT: [[IV_NEXT]] = add nuw nsw i32 [[IV]], 1
234130
; CHECK-NEXT: [[EC:%.*]] = icmp eq i32 [[IV_NEXT]], 3
235-
; CHECK-NEXT: br i1 [[EC]], label [[EXIT]], label [[LOOP_HEADER]], !llvm.loop [[LOOP6:![0-9]+]]
131+
; CHECK-NEXT: br i1 [[EC]], label [[EXIT:%.*]], label [[LOOP_HEADER]]
236132
; CHECK: exit:
237133
; CHECK-NEXT: ret void
238134
;

‎llvm/test/Transforms/LoopVectorize/X86/fixed-order-recurrence.ll‎

Lines changed: 3 additions & 65 deletions
Original file line numberDiff line numberDiff line change
@@ -441,78 +441,16 @@ define void @test_first_order_recurrence_tried_to_scalarized(ptr %dst, i1 %c, i3
441441
; CHECK-LABEL: @test_first_order_recurrence_tried_to_scalarized(
442442
; CHECK-NEXT: entry:
443443
; CHECK-NEXT: [[N:%.*]] = select i1 [[C:%.*]], i32 8, i32 9
444-
; CHECK-NEXT: br i1 false, label [[SCALAR_PH:%.*]], label [[VECTOR_PH:%.*]]
445-
; CHECK: vector.ph:
446-
; CHECK-NEXT: [[N_RND_UP:%.*]] = add i32 [[N]], 3
447-
; CHECK-NEXT: [[N_MOD_VF:%.*]] = urem i32 [[N_RND_UP]], 4
448-
; CHECK-NEXT: [[N_VEC:%.*]] = sub i32 [[N_RND_UP]], [[N_MOD_VF]]
449-
; CHECK-NEXT: [[TRIP_COUNT_MINUS_1:%.*]] = sub i32 [[N]], 1
450-
; CHECK-NEXT: [[BROADCAST_SPLATINSERT:%.*]] = insertelement <4 x i32> poison, i32 [[TRIP_COUNT_MINUS_1]], i64 0
451-
; CHECK-NEXT: [[BROADCAST_SPLAT:%.*]] = shufflevector <4 x i32> [[BROADCAST_SPLATINSERT]], <4 x i32> poison, <4 x i32> zeroinitializer
452-
; CHECK-NEXT: br label [[VECTOR_BODY:%.*]]
453-
; CHECK: vector.body:
454-
; CHECK-NEXT: [[INDEX:%.*]] = phi i32 [ 0, [[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], [[PRED_STORE_CONTINUE6:%.*]] ]
455-
; CHECK-NEXT: [[VEC_IND:%.*]] = phi <4 x i32> [ <i32 0, i32 1, i32 2, i32 3>, [[VECTOR_PH]] ], [ [[VEC_IND_NEXT:%.*]], [[PRED_STORE_CONTINUE6]] ]
456-
; CHECK-NEXT: [[VECTOR_RECUR:%.*]] = phi <4 x i32> [ <i32 poison, i32 poison, i32 poison, i32 4>, [[VECTOR_PH]] ], [ [[VEC_IND]], [[PRED_STORE_CONTINUE6]] ]
457-
; CHECK-NEXT: [[TMP0:%.*]] = shufflevector <4 x i32> [[VECTOR_RECUR]], <4 x i32> [[VEC_IND]], <4 x i32> <i32 3, i32 4, i32 5, i32 6>
458-
; CHECK-NEXT: [[TMP1:%.*]] = icmp ule <4 x i32> [[VEC_IND]], [[BROADCAST_SPLAT]]
459-
; CHECK-NEXT: [[TMP2:%.*]] = extractelement <4 x i1> [[TMP1]], i32 0
460-
; CHECK-NEXT: br i1 [[TMP2]], label [[PRED_STORE_IF:%.*]], label [[PRED_STORE_CONTINUE:%.*]]
461-
; CHECK: pred.store.if:
462-
; CHECK-NEXT: [[TMP3:%.*]] = add i32 [[INDEX]], 0
463-
; CHECK-NEXT: [[TMP4:%.*]] = getelementptr inbounds nuw i32, ptr [[DST:%.*]], i32 [[TMP3]]
464-
; CHECK-NEXT: [[TMP5:%.*]] = extractelement <4 x i32> [[TMP0]], i32 0
465-
; CHECK-NEXT: [[TMP6:%.*]] = sub nsw i32 10, [[TMP5]]
466-
; CHECK-NEXT: store i32 [[TMP6]], ptr [[TMP4]], align 4
467-
; CHECK-NEXT: br label [[PRED_STORE_CONTINUE]]
468-
; CHECK: pred.store.continue:
469-
; CHECK-NEXT: [[TMP7:%.*]] = extractelement <4 x i1> [[TMP1]], i32 1
470-
; CHECK-NEXT: br i1 [[TMP7]], label [[PRED_STORE_IF1:%.*]], label [[PRED_STORE_CONTINUE2:%.*]]
471-
; CHECK: pred.store.if1:
472-
; CHECK-NEXT: [[TMP8:%.*]] = add i32 [[INDEX]], 1
473-
; CHECK-NEXT: [[TMP9:%.*]] = getelementptr inbounds nuw i32, ptr [[DST]], i32 [[TMP8]]
474-
; CHECK-NEXT: [[TMP10:%.*]] = extractelement <4 x i32> [[TMP0]], i32 1
475-
; CHECK-NEXT: [[TMP11:%.*]] = sub nsw i32 10, [[TMP10]]
476-
; CHECK-NEXT: store i32 [[TMP11]], ptr [[TMP9]], align 4
477-
; CHECK-NEXT: br label [[PRED_STORE_CONTINUE2]]
478-
; CHECK: pred.store.continue2:
479-
; CHECK-NEXT: [[TMP12:%.*]] = extractelement <4 x i1> [[TMP1]], i32 2
480-
; CHECK-NEXT: br i1 [[TMP12]], label [[PRED_STORE_IF3:%.*]], label [[PRED_STORE_CONTINUE4:%.*]]
481-
; CHECK: pred.store.if3:
482-
; CHECK-NEXT: [[TMP13:%.*]] = add i32 [[INDEX]], 2
483-
; CHECK-NEXT: [[TMP14:%.*]] = getelementptr inbounds nuw i32, ptr [[DST]], i32 [[TMP13]]
484-
; CHECK-NEXT: [[TMP15:%.*]] = extractelement <4 x i32> [[TMP0]], i32 2
485-
; CHECK-NEXT: [[TMP16:%.*]] = sub nsw i32 10, [[TMP15]]
486-
; CHECK-NEXT: store i32 [[TMP16]], ptr [[TMP14]], align 4
487-
; CHECK-NEXT: br label [[PRED_STORE_CONTINUE4]]
488-
; CHECK: pred.store.continue4:
489-
; CHECK-NEXT: [[TMP17:%.*]] = extractelement <4 x i1> [[TMP1]], i32 3
490-
; CHECK-NEXT: br i1 [[TMP17]], label [[PRED_STORE_IF5:%.*]], label [[PRED_STORE_CONTINUE6]]
491-
; CHECK: pred.store.if5:
492-
; CHECK-NEXT: [[TMP18:%.*]] = add i32 [[INDEX]], 3
493-
; CHECK-NEXT: [[TMP19:%.*]] = getelementptr inbounds nuw i32, ptr [[DST]], i32 [[TMP18]]
494-
; CHECK-NEXT: [[TMP20:%.*]] = extractelement <4 x i32> [[TMP0]], i32 3
495-
; CHECK-NEXT: [[TMP21:%.*]] = sub nsw i32 10, [[TMP20]]
496-
; CHECK-NEXT: store i32 [[TMP21]], ptr [[TMP19]], align 4
497-
; CHECK-NEXT: br label [[PRED_STORE_CONTINUE6]]
498-
; CHECK: pred.store.continue6:
499-
; CHECK-NEXT: [[INDEX_NEXT]] = add nuw i32 [[INDEX]], 4
500-
; CHECK-NEXT: [[VEC_IND_NEXT]] = add <4 x i32> [[VEC_IND]], splat (i32 4)
501-
; CHECK-NEXT: [[TMP22:%.*]] = icmp eq i32 [[INDEX_NEXT]], [[N_VEC]]
502-
; CHECK-NEXT: br i1 [[TMP22]], label [[MIDDLE_BLOCK:%.*]], label [[VECTOR_BODY]], !llvm.loop [[LOOP12:![0-9]+]]
503-
; CHECK: middle.block:
504-
; CHECK-NEXT: br label [[EXIT:%.*]]
505-
; CHECK: scalar.ph:
506444
; CHECK-NEXT: br label [[LOOP:%.*]]
507445
; CHECK: loop:
508-
; CHECK-NEXT: [[IV:%.*]] = phi i32 [ 0, [[SCALAR_PH]] ], [ [[IV_NEXT:%.*]], [[LOOP]] ]
446+
; CHECK-NEXT: [[IV:%.*]] = phi i32 [ 0, [[SCALAR_PH:%.*]] ], [ [[IV_NEXT:%.*]], [[LOOP]] ]
509447
; CHECK-NEXT: [[FOR:%.*]] = phi i32 [ 4, [[SCALAR_PH]] ], [ [[IV]], [[LOOP]] ]
510448
; CHECK-NEXT: [[IV_NEXT]] = add nuw nsw i32 [[IV]], 1
511449
; CHECK-NEXT: [[SUB:%.*]] = sub nsw i32 10, [[FOR]]
512-
; CHECK-NEXT: [[GEP_DST:%.*]] = getelementptr inbounds nuw i32, ptr [[DST]], i32 [[IV]]
450+
; CHECK-NEXT: [[GEP_DST:%.*]] = getelementptr inbounds nuw i32, ptr [[DST:%.*]], i32 [[IV]]
513451
; CHECK-NEXT: store i32 [[SUB]], ptr [[GEP_DST]], align 4
514452
; CHECK-NEXT: [[EC:%.*]] = icmp eq i32 [[IV_NEXT]], [[N]]
515-
; CHECK-NEXT: br i1 [[EC]], label [[EXIT]], label [[LOOP]], !llvm.loop [[LOOP13:![0-9]+]]
453+
; CHECK-NEXT: br i1 [[EC]], label [[EXIT:%.*]], label [[LOOP]]
516454
; CHECK: exit:
517455
; CHECK-NEXT: ret void
518456
;

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