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[AArch64] Remove CODE llc run lines from costmodel tests. NFC
The code is already tested in CodeGen/AArch64 tests such as neon-perm.ll and the select- tests.
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Lines changed: 98 additions & 98 deletions
Original file line numberDiff line numberDiff line change
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1-
; RUN: opt < %s -mtriple=aarch64--linux-gnu -passes="print<cost-model>" 2>&1 -disable-output | FileCheck %s --check-prefix=COST
2-
; RUN: llc < %s -mtriple=aarch64--linux-gnu | FileCheck %s --check-prefix=CODE
1+
; NOTE: Assertions have been autogenerated by utils/update_analyze_test_checks.py UTC_ARGS: --version 5
2+
; RUN: opt < %s -mtriple=aarch64--linux-gnu -passes="print<cost-model>" -cost-kind=all 2>&1 -disable-output | FileCheck %s
33

44
target datalayout = "e-m:e-i8:8:32-i16:16:32-i64:64-i128:128-n32:64-S128"
55

6-
; COST-LABEL: trn1.v8i8
7-
; COST: Found an estimated cost of 1 for instruction: %tmp0 = shufflevector <8 x i8> %v0, <8 x i8> %v1, <8 x i32> <i32 0, i32 8, i32 2, i32 10, i32 4, i32 12, i32 6, i32 14>
8-
; CODE-LABEL: trn1.v8i8
9-
; CODE: trn1 v0.8b, v0.8b, v1.8b
106
define <8 x i8> @trn1.v8i8(<8 x i8> %v0, <8 x i8> %v1) {
7+
; CHECK-LABEL: 'trn1.v8i8'
8+
; CHECK-NEXT: Cost Model: Found costs of 1 for: %tmp0 = shufflevector <8 x i8> %v0, <8 x i8> %v1, <8 x i32> <i32 0, i32 8, i32 2, i32 10, i32 4, i32 12, i32 6, i32 14>
9+
; CHECK-NEXT: Cost Model: Found costs of RThru:0 CodeSize:1 Lat:1 SizeLat:1 for: ret <8 x i8> %tmp0
10+
;
1111
%tmp0 = shufflevector <8 x i8> %v0, <8 x i8> %v1, <8 x i32> <i32 0, i32 8, i32 2, i32 10, i32 4, i32 12, i32 6, i32 14>
1212
ret <8 x i8> %tmp0
1313
}
1414

15-
; COST-LABEL: trn2.v8i8
16-
; COST: Found an estimated cost of 1 for instruction: %tmp0 = shufflevector <8 x i8> %v0, <8 x i8> %v1, <8 x i32> <i32 1, i32 9, i32 3, i32 11, i32 5, i32 13, i32 7, i32 15>
17-
; CODE-LABEL: trn2.v8i8
18-
; CODE: trn2 v0.8b, v0.8b, v1.8b
1915
define <8 x i8> @trn2.v8i8(<8 x i8> %v0, <8 x i8> %v1) {
16+
; CHECK-LABEL: 'trn2.v8i8'
17+
; CHECK-NEXT: Cost Model: Found costs of 1 for: %tmp0 = shufflevector <8 x i8> %v0, <8 x i8> %v1, <8 x i32> <i32 1, i32 9, i32 3, i32 11, i32 5, i32 13, i32 7, i32 15>
18+
; CHECK-NEXT: Cost Model: Found costs of RThru:0 CodeSize:1 Lat:1 SizeLat:1 for: ret <8 x i8> %tmp0
19+
;
2020
%tmp0 = shufflevector <8 x i8> %v0, <8 x i8> %v1, <8 x i32> <i32 1, i32 9, i32 3, i32 11, i32 5, i32 13, i32 7, i32 15>
2121
ret <8 x i8> %tmp0
2222
}
2323

24-
; COST-LABEL: trn1.v16i8
25-
; COST: Found an estimated cost of 1 for instruction: %tmp0 = shufflevector <16 x i8> %v0, <16 x i8> %v1, <16 x i32> <i32 0, i32 16, i32 2, i32 18, i32 4, i32 20, i32 6, i32 22, i32 8, i32 24, i32 10, i32 26, i32 12, i32 28, i32 14, i32 30>
26-
; CODE-LABEL: trn1.v16i8
27-
; CODE: trn1 v0.16b, v0.16b, v1.16b
2824
define <16 x i8> @trn1.v16i8(<16 x i8> %v0, <16 x i8> %v1) {
25+
; CHECK-LABEL: 'trn1.v16i8'
26+
; CHECK-NEXT: Cost Model: Found costs of 1 for: %tmp0 = shufflevector <16 x i8> %v0, <16 x i8> %v1, <16 x i32> <i32 0, i32 16, i32 2, i32 18, i32 4, i32 20, i32 6, i32 22, i32 8, i32 24, i32 10, i32 26, i32 12, i32 28, i32 14, i32 30>
27+
; CHECK-NEXT: Cost Model: Found costs of RThru:0 CodeSize:1 Lat:1 SizeLat:1 for: ret <16 x i8> %tmp0
28+
;
2929
%tmp0 = shufflevector <16 x i8> %v0, <16 x i8> %v1, <16 x i32> <i32 0, i32 16, i32 2, i32 18, i32 4, i32 20, i32 6, i32 22, i32 8, i32 24, i32 10, i32 26, i32 12, i32 28, i32 14, i32 30>
3030
ret <16 x i8> %tmp0
3131
}
3232

33-
; COST-LABEL: trn2.v16i8
34-
; COST: Found an estimated cost of 1 for instruction: %tmp0 = shufflevector <16 x i8> %v0, <16 x i8> %v1, <16 x i32> <i32 1, i32 17, i32 3, i32 19, i32 5, i32 21, i32 7, i32 23, i32 9, i32 25, i32 11, i32 27, i32 13, i32 29, i32 15, i32 31>
35-
; CODE-LABEL: trn2.v16i8
36-
; CODE: trn2 v0.16b, v0.16b, v1.16b
3733
define <16 x i8> @trn2.v16i8(<16 x i8> %v0, <16 x i8> %v1) {
34+
; CHECK-LABEL: 'trn2.v16i8'
35+
; CHECK-NEXT: Cost Model: Found costs of 1 for: %tmp0 = shufflevector <16 x i8> %v0, <16 x i8> %v1, <16 x i32> <i32 1, i32 17, i32 3, i32 19, i32 5, i32 21, i32 7, i32 23, i32 9, i32 25, i32 11, i32 27, i32 13, i32 29, i32 15, i32 31>
36+
; CHECK-NEXT: Cost Model: Found costs of RThru:0 CodeSize:1 Lat:1 SizeLat:1 for: ret <16 x i8> %tmp0
37+
;
3838
%tmp0 = shufflevector <16 x i8> %v0, <16 x i8> %v1, <16 x i32> <i32 1, i32 17, i32 3, i32 19, i32 5, i32 21, i32 7, i32 23, i32 9, i32 25, i32 11, i32 27, i32 13, i32 29, i32 15, i32 31>
3939
ret <16 x i8> %tmp0
4040
}
4141

42-
; COST-LABEL: trn1.v4i16
43-
; COST: Found an estimated cost of 1 for instruction: %tmp0 = shufflevector <4 x i16> %v0, <4 x i16> %v1, <4 x i32> <i32 0, i32 4, i32 2, i32 6>
44-
; CODE-LABEL: trn1.v4i16
45-
; CODE: trn1 v0.4h, v0.4h, v1.4h
4642
define <4 x i16> @trn1.v4i16(<4 x i16> %v0, <4 x i16> %v1) {
43+
; CHECK-LABEL: 'trn1.v4i16'
44+
; CHECK-NEXT: Cost Model: Found costs of 1 for: %tmp0 = shufflevector <4 x i16> %v0, <4 x i16> %v1, <4 x i32> <i32 0, i32 4, i32 2, i32 6>
45+
; CHECK-NEXT: Cost Model: Found costs of RThru:0 CodeSize:1 Lat:1 SizeLat:1 for: ret <4 x i16> %tmp0
46+
;
4747
%tmp0 = shufflevector <4 x i16> %v0, <4 x i16> %v1, <4 x i32> <i32 0, i32 4, i32 2, i32 6>
4848
ret <4 x i16> %tmp0
4949
}
5050

51-
; COST-LABEL: trn2.v4i16
52-
; COST: Found an estimated cost of 1 for instruction: %tmp0 = shufflevector <4 x i16> %v0, <4 x i16> %v1, <4 x i32> <i32 1, i32 5, i32 3, i32 7>
53-
; CODE-LABEL: trn2.v4i16
54-
; CODE: trn2 v0.4h, v0.4h, v1.4h
5551
define <4 x i16> @trn2.v4i16(<4 x i16> %v0, <4 x i16> %v1) {
52+
; CHECK-LABEL: 'trn2.v4i16'
53+
; CHECK-NEXT: Cost Model: Found costs of 1 for: %tmp0 = shufflevector <4 x i16> %v0, <4 x i16> %v1, <4 x i32> <i32 1, i32 5, i32 3, i32 7>
54+
; CHECK-NEXT: Cost Model: Found costs of RThru:0 CodeSize:1 Lat:1 SizeLat:1 for: ret <4 x i16> %tmp0
55+
;
5656
%tmp0 = shufflevector <4 x i16> %v0, <4 x i16> %v1, <4 x i32> <i32 1, i32 5, i32 3, i32 7>
5757
ret <4 x i16> %tmp0
5858
}
5959

60-
; COST-LABEL: trn1.v8i16
61-
; COST: Found an estimated cost of 1 for instruction: %tmp0 = shufflevector <8 x i16> %v0, <8 x i16> %v1, <8 x i32> <i32 0, i32 8, i32 2, i32 10, i32 4, i32 12, i32 6, i32 14>
62-
; CODE-LABEL: trn1.v8i16
63-
; CODE: trn1 v0.8h, v0.8h, v1.8h
6460
define <8 x i16> @trn1.v8i16(<8 x i16> %v0, <8 x i16> %v1) {
61+
; CHECK-LABEL: 'trn1.v8i16'
62+
; CHECK-NEXT: Cost Model: Found costs of 1 for: %tmp0 = shufflevector <8 x i16> %v0, <8 x i16> %v1, <8 x i32> <i32 0, i32 8, i32 2, i32 10, i32 4, i32 12, i32 6, i32 14>
63+
; CHECK-NEXT: Cost Model: Found costs of RThru:0 CodeSize:1 Lat:1 SizeLat:1 for: ret <8 x i16> %tmp0
64+
;
6565
%tmp0 = shufflevector <8 x i16> %v0, <8 x i16> %v1, <8 x i32> <i32 0, i32 8, i32 2, i32 10, i32 4, i32 12, i32 6, i32 14>
6666
ret <8 x i16> %tmp0
6767
}
6868

69-
; COST-LABEL: trn2.v8i16
70-
; COST: Found an estimated cost of 1 for instruction: %tmp0 = shufflevector <8 x i16> %v0, <8 x i16> %v1, <8 x i32> <i32 1, i32 9, i32 3, i32 11, i32 5, i32 13, i32 7, i32 15>
71-
; CODE-LABEL: trn2.v8i16
72-
; CODE: trn2 v0.8h, v0.8h, v1.8h
7369
define <8 x i16> @trn2.v8i16(<8 x i16> %v0, <8 x i16> %v1) {
70+
; CHECK-LABEL: 'trn2.v8i16'
71+
; CHECK-NEXT: Cost Model: Found costs of 1 for: %tmp0 = shufflevector <8 x i16> %v0, <8 x i16> %v1, <8 x i32> <i32 1, i32 9, i32 3, i32 11, i32 5, i32 13, i32 7, i32 15>
72+
; CHECK-NEXT: Cost Model: Found costs of RThru:0 CodeSize:1 Lat:1 SizeLat:1 for: ret <8 x i16> %tmp0
73+
;
7474
%tmp0 = shufflevector <8 x i16> %v0, <8 x i16> %v1, <8 x i32> <i32 1, i32 9, i32 3, i32 11, i32 5, i32 13, i32 7, i32 15>
7575
ret <8 x i16> %tmp0
7676
}
7777

78-
; COST-LABEL: trn1.v2i32
79-
; COST: Found an estimated cost of 1 for instruction: %tmp0 = shufflevector <2 x i32> %v0, <2 x i32> %v1, <2 x i32> <i32 0, i32 2>
80-
; CODE-LABEL: trn1.v2i32
81-
; CODE: zip1 v0.2s, v0.2s, v1.2s
8278
define <2 x i32> @trn1.v2i32(<2 x i32> %v0, <2 x i32> %v1) {
79+
; CHECK-LABEL: 'trn1.v2i32'
80+
; CHECK-NEXT: Cost Model: Found costs of 1 for: %tmp0 = shufflevector <2 x i32> %v0, <2 x i32> %v1, <2 x i32> <i32 0, i32 2>
81+
; CHECK-NEXT: Cost Model: Found costs of RThru:0 CodeSize:1 Lat:1 SizeLat:1 for: ret <2 x i32> %tmp0
82+
;
8383
%tmp0 = shufflevector <2 x i32> %v0, <2 x i32> %v1, <2 x i32> <i32 0, i32 2>
8484
ret <2 x i32> %tmp0
8585
}
8686

87-
; COST-LABEL: trn2.v2i32
88-
; COST: Found an estimated cost of 1 for instruction: %tmp0 = shufflevector <2 x i32> %v0, <2 x i32> %v1, <2 x i32> <i32 1, i32 3>
89-
; CODE-LABEL: trn2.v2i32
90-
; CODE: zip2 v0.2s, v0.2s, v1.2s
9187
define <2 x i32> @trn2.v2i32(<2 x i32> %v0, <2 x i32> %v1) {
88+
; CHECK-LABEL: 'trn2.v2i32'
89+
; CHECK-NEXT: Cost Model: Found costs of 1 for: %tmp0 = shufflevector <2 x i32> %v0, <2 x i32> %v1, <2 x i32> <i32 1, i32 3>
90+
; CHECK-NEXT: Cost Model: Found costs of RThru:0 CodeSize:1 Lat:1 SizeLat:1 for: ret <2 x i32> %tmp0
91+
;
9292
%tmp0 = shufflevector <2 x i32> %v0, <2 x i32> %v1, <2 x i32> <i32 1, i32 3>
9393
ret <2 x i32> %tmp0
9494
}
9595

96-
; COST-LABEL: trn1.v4i32
97-
; COST: Found an estimated cost of 1 for instruction: %tmp0 = shufflevector <4 x i32> %v0, <4 x i32> %v1, <4 x i32> <i32 0, i32 4, i32 2, i32 6>
98-
; CODE-LABEL: trn1.v4i32
99-
; CODE: trn1 v0.4s, v0.4s, v1.4s
10096
define <4 x i32> @trn1.v4i32(<4 x i32> %v0, <4 x i32> %v1) {
97+
; CHECK-LABEL: 'trn1.v4i32'
98+
; CHECK-NEXT: Cost Model: Found costs of 1 for: %tmp0 = shufflevector <4 x i32> %v0, <4 x i32> %v1, <4 x i32> <i32 0, i32 4, i32 2, i32 6>
99+
; CHECK-NEXT: Cost Model: Found costs of RThru:0 CodeSize:1 Lat:1 SizeLat:1 for: ret <4 x i32> %tmp0
100+
;
101101
%tmp0 = shufflevector <4 x i32> %v0, <4 x i32> %v1, <4 x i32> <i32 0, i32 4, i32 2, i32 6>
102102
ret <4 x i32> %tmp0
103103
}
104104

105-
; COST-LABEL: trn2.v4i32
106-
; COST: Found an estimated cost of 1 for instruction: %tmp0 = shufflevector <4 x i32> %v0, <4 x i32> %v1, <4 x i32> <i32 1, i32 5, i32 3, i32 7>
107-
; CODE-LABEL: trn2.v4i32
108-
; CODE: trn2 v0.4s, v0.4s, v1.4s
109105
define <4 x i32> @trn2.v4i32(<4 x i32> %v0, <4 x i32> %v1) {
106+
; CHECK-LABEL: 'trn2.v4i32'
107+
; CHECK-NEXT: Cost Model: Found costs of 1 for: %tmp0 = shufflevector <4 x i32> %v0, <4 x i32> %v1, <4 x i32> <i32 1, i32 5, i32 3, i32 7>
108+
; CHECK-NEXT: Cost Model: Found costs of RThru:0 CodeSize:1 Lat:1 SizeLat:1 for: ret <4 x i32> %tmp0
109+
;
110110
%tmp0 = shufflevector <4 x i32> %v0, <4 x i32> %v1, <4 x i32> <i32 1, i32 5, i32 3, i32 7>
111111
ret <4 x i32> %tmp0
112112
}
113113

114-
; COST-LABEL: trn1.v2i64
115-
; COST: Found an estimated cost of 1 for instruction: %tmp0 = shufflevector <2 x i64> %v0, <2 x i64> %v1, <2 x i32> <i32 0, i32 2>
116-
; CODE-LABEL: trn1.v2i64
117-
; CODE: zip1 v0.2d, v0.2d, v1.2d
118114
define <2 x i64> @trn1.v2i64(<2 x i64> %v0, <2 x i64> %v1) {
115+
; CHECK-LABEL: 'trn1.v2i64'
116+
; CHECK-NEXT: Cost Model: Found costs of 1 for: %tmp0 = shufflevector <2 x i64> %v0, <2 x i64> %v1, <2 x i32> <i32 0, i32 2>
117+
; CHECK-NEXT: Cost Model: Found costs of RThru:0 CodeSize:1 Lat:1 SizeLat:1 for: ret <2 x i64> %tmp0
118+
;
119119
%tmp0 = shufflevector <2 x i64> %v0, <2 x i64> %v1, <2 x i32> <i32 0, i32 2>
120120
ret <2 x i64> %tmp0
121121
}
122122

123-
; COST-LABEL: trn2.v2i64
124-
; COST: Found an estimated cost of 1 for instruction: %tmp0 = shufflevector <2 x i64> %v0, <2 x i64> %v1, <2 x i32> <i32 1, i32 3>
125-
; CODE-LABEL: trn2.v2i64
126-
; CODE: zip2 v0.2d, v0.2d, v1.2d
127123
define <2 x i64> @trn2.v2i64(<2 x i64> %v0, <2 x i64> %v1) {
124+
; CHECK-LABEL: 'trn2.v2i64'
125+
; CHECK-NEXT: Cost Model: Found costs of 1 for: %tmp0 = shufflevector <2 x i64> %v0, <2 x i64> %v1, <2 x i32> <i32 1, i32 3>
126+
; CHECK-NEXT: Cost Model: Found costs of RThru:0 CodeSize:1 Lat:1 SizeLat:1 for: ret <2 x i64> %tmp0
127+
;
128128
%tmp0 = shufflevector <2 x i64> %v0, <2 x i64> %v1, <2 x i32> <i32 1, i32 3>
129129
ret <2 x i64> %tmp0
130130
}
131131

132-
; COST-LABEL: trn1.v2f32
133-
; COST: Found an estimated cost of 1 for instruction: %tmp0 = shufflevector <2 x float> %v0, <2 x float> %v1, <2 x i32> <i32 0, i32 2>
134-
; CODE-LABEL: trn1.v2f32
135-
; CODE: zip1 v0.2s, v0.2s, v1.2s
136132
define <2 x float> @trn1.v2f32(<2 x float> %v0, <2 x float> %v1) {
133+
; CHECK-LABEL: 'trn1.v2f32'
134+
; CHECK-NEXT: Cost Model: Found costs of 1 for: %tmp0 = shufflevector <2 x float> %v0, <2 x float> %v1, <2 x i32> <i32 0, i32 2>
135+
; CHECK-NEXT: Cost Model: Found costs of RThru:0 CodeSize:1 Lat:1 SizeLat:1 for: ret <2 x float> %tmp0
136+
;
137137
%tmp0 = shufflevector <2 x float> %v0, <2 x float> %v1, <2 x i32> <i32 0, i32 2>
138138
ret <2 x float> %tmp0
139139
}
140140

141-
; COST-LABEL: trn2.v2f32
142-
; COST: Found an estimated cost of 1 for instruction: %tmp0 = shufflevector <2 x float> %v0, <2 x float> %v1, <2 x i32> <i32 1, i32 3>
143-
; CODE-LABEL: trn2.v2f32
144-
; CODE: zip2 v0.2s, v0.2s, v1.2s
145141
define <2 x float> @trn2.v2f32(<2 x float> %v0, <2 x float> %v1) {
142+
; CHECK-LABEL: 'trn2.v2f32'
143+
; CHECK-NEXT: Cost Model: Found costs of 1 for: %tmp0 = shufflevector <2 x float> %v0, <2 x float> %v1, <2 x i32> <i32 1, i32 3>
144+
; CHECK-NEXT: Cost Model: Found costs of RThru:0 CodeSize:1 Lat:1 SizeLat:1 for: ret <2 x float> %tmp0
145+
;
146146
%tmp0 = shufflevector <2 x float> %v0, <2 x float> %v1, <2 x i32> <i32 1, i32 3>
147147
ret <2 x float> %tmp0
148148
}
149149

150-
; COST-LABEL: trn1.v4f32
151-
; COST: Found an estimated cost of 1 for instruction: %tmp0 = shufflevector <4 x float> %v0, <4 x float> %v1, <4 x i32> <i32 0, i32 4, i32 2, i32 6>
152-
; CODE-LABEL: trn1.v4f32
153-
; CODE: trn1 v0.4s, v0.4s, v1.4s
154150
define <4 x float> @trn1.v4f32(<4 x float> %v0, <4 x float> %v1) {
151+
; CHECK-LABEL: 'trn1.v4f32'
152+
; CHECK-NEXT: Cost Model: Found costs of 1 for: %tmp0 = shufflevector <4 x float> %v0, <4 x float> %v1, <4 x i32> <i32 0, i32 4, i32 2, i32 6>
153+
; CHECK-NEXT: Cost Model: Found costs of RThru:0 CodeSize:1 Lat:1 SizeLat:1 for: ret <4 x float> %tmp0
154+
;
155155
%tmp0 = shufflevector <4 x float> %v0, <4 x float> %v1, <4 x i32> <i32 0, i32 4, i32 2, i32 6>
156156
ret <4 x float> %tmp0
157157
}
158158

159-
; COST-LABEL: trn2.v4f32
160-
; COST: Found an estimated cost of 1 for instruction: %tmp0 = shufflevector <4 x float> %v0, <4 x float> %v1, <4 x i32> <i32 1, i32 5, i32 3, i32 7>
161-
; CODE-LABEL: trn2.v4f32
162-
; CODE: trn2 v0.4s, v0.4s, v1.4s
163159
define <4 x float> @trn2.v4f32(<4 x float> %v0, <4 x float> %v1) {
160+
; CHECK-LABEL: 'trn2.v4f32'
161+
; CHECK-NEXT: Cost Model: Found costs of 1 for: %tmp0 = shufflevector <4 x float> %v0, <4 x float> %v1, <4 x i32> <i32 1, i32 5, i32 3, i32 7>
162+
; CHECK-NEXT: Cost Model: Found costs of RThru:0 CodeSize:1 Lat:1 SizeLat:1 for: ret <4 x float> %tmp0
163+
;
164164
%tmp0 = shufflevector <4 x float> %v0, <4 x float> %v1, <4 x i32> <i32 1, i32 5, i32 3, i32 7>
165165
ret <4 x float> %tmp0
166166
}
167167

168-
; COST-LABEL: trn1.v2f64
169-
; COST: Found an estimated cost of 1 for instruction: %tmp0 = shufflevector <2 x double> %v0, <2 x double> %v1, <2 x i32> <i32 0, i32 2>
170-
; CODE-LABEL: trn1.v2f64
171-
; CODE: zip1 v0.2d, v0.2d, v1.2d
172168
define <2 x double> @trn1.v2f64(<2 x double> %v0, <2 x double> %v1) {
169+
; CHECK-LABEL: 'trn1.v2f64'
170+
; CHECK-NEXT: Cost Model: Found costs of 1 for: %tmp0 = shufflevector <2 x double> %v0, <2 x double> %v1, <2 x i32> <i32 0, i32 2>
171+
; CHECK-NEXT: Cost Model: Found costs of RThru:0 CodeSize:1 Lat:1 SizeLat:1 for: ret <2 x double> %tmp0
172+
;
173173
%tmp0 = shufflevector <2 x double> %v0, <2 x double> %v1, <2 x i32> <i32 0, i32 2>
174174
ret <2 x double> %tmp0
175175
}
176176

177-
; COST-LABEL: trn2.v2f64
178-
; COST: Found an estimated cost of 1 for instruction: %tmp0 = shufflevector <2 x double> %v0, <2 x double> %v1, <2 x i32> <i32 1, i32 3>
179-
; CODE-LABEL: trn2.v2f64
180-
; CODE: zip2 v0.2d, v0.2d, v1.2d
181177
define <2 x double> @trn2.v2f64(<2 x double> %v0, <2 x double> %v1) {
178+
; CHECK-LABEL: 'trn2.v2f64'
179+
; CHECK-NEXT: Cost Model: Found costs of 1 for: %tmp0 = shufflevector <2 x double> %v0, <2 x double> %v1, <2 x i32> <i32 1, i32 3>
180+
; CHECK-NEXT: Cost Model: Found costs of RThru:0 CodeSize:1 Lat:1 SizeLat:1 for: ret <2 x double> %tmp0
181+
;
182182
%tmp0 = shufflevector <2 x double> %v0, <2 x double> %v1, <2 x i32> <i32 1, i32 3>
183183
ret <2 x double> %tmp0
184184
}
185185

186-
; COST-LABEL: trn1.v4f16
187-
; COST: Found an estimated cost of 1 for instruction: %tmp0 = shufflevector <4 x half> %v0, <4 x half> %v1, <4 x i32> <i32 0, i32 4, i32 2, i32 6>
188-
; CODE-LABEL: trn1.v4f16
189-
; CODE: trn1 v0.4h, v0.4h, v1.4h
190186
define <4 x half> @trn1.v4f16(<4 x half> %v0, <4 x half> %v1) {
187+
; CHECK-LABEL: 'trn1.v4f16'
188+
; CHECK-NEXT: Cost Model: Found costs of 1 for: %tmp0 = shufflevector <4 x half> %v0, <4 x half> %v1, <4 x i32> <i32 0, i32 4, i32 2, i32 6>
189+
; CHECK-NEXT: Cost Model: Found costs of RThru:0 CodeSize:1 Lat:1 SizeLat:1 for: ret <4 x half> %tmp0
190+
;
191191
%tmp0 = shufflevector <4 x half> %v0, <4 x half> %v1, <4 x i32> <i32 0, i32 4, i32 2, i32 6>
192192
ret <4 x half> %tmp0
193193
}
194194

195-
; COST-LABEL: trn2.v4f16
196-
; COST: Found an estimated cost of 1 for instruction: %tmp0 = shufflevector <4 x half> %v0, <4 x half> %v1, <4 x i32> <i32 1, i32 5, i32 3, i32 7>
197-
; CODE-LABEL: trn2.v4f16
198-
; CODE: trn2 v0.4h, v0.4h, v1.4h
199195
define <4 x half> @trn2.v4f16(<4 x half> %v0, <4 x half> %v1) {
196+
; CHECK-LABEL: 'trn2.v4f16'
197+
; CHECK-NEXT: Cost Model: Found costs of 1 for: %tmp0 = shufflevector <4 x half> %v0, <4 x half> %v1, <4 x i32> <i32 1, i32 5, i32 3, i32 7>
198+
; CHECK-NEXT: Cost Model: Found costs of RThru:0 CodeSize:1 Lat:1 SizeLat:1 for: ret <4 x half> %tmp0
199+
;
200200
%tmp0 = shufflevector <4 x half> %v0, <4 x half> %v1, <4 x i32> <i32 1, i32 5, i32 3, i32 7>
201201
ret <4 x half> %tmp0
202202
}
203203

204-
; COST-LABEL: trn1.v8f16
205-
; COST: Found an estimated cost of 1 for instruction: %tmp0 = shufflevector <8 x half> %v0, <8 x half> %v1, <8 x i32> <i32 0, i32 8, i32 2, i32 10, i32 4, i32 12, i32 6, i32 14>
206-
; CODE-LABEL: trn1.v8f16
207-
; CODE: trn1 v0.8h, v0.8h, v1.8h
208204
define <8 x half> @trn1.v8f16(<8 x half> %v0, <8 x half> %v1) {
205+
; CHECK-LABEL: 'trn1.v8f16'
206+
; CHECK-NEXT: Cost Model: Found costs of 1 for: %tmp0 = shufflevector <8 x half> %v0, <8 x half> %v1, <8 x i32> <i32 0, i32 8, i32 2, i32 10, i32 4, i32 12, i32 6, i32 14>
207+
; CHECK-NEXT: Cost Model: Found costs of RThru:0 CodeSize:1 Lat:1 SizeLat:1 for: ret <8 x half> %tmp0
208+
;
209209
%tmp0 = shufflevector <8 x half> %v0, <8 x half> %v1, <8 x i32> <i32 0, i32 8, i32 2, i32 10, i32 4, i32 12, i32 6, i32 14>
210210
ret <8 x half> %tmp0
211211
}
212212

213-
; COST-LABEL: trn2.v8f16
214-
; COST: Found an estimated cost of 1 for instruction: %tmp0 = shufflevector <8 x half> %v0, <8 x half> %v1, <8 x i32> <i32 1, i32 9, i32 3, i32 11, i32 5, i32 13, i32 7, i32 15>
215-
; CODE-LABEL: trn2.v8f16
216-
; CODE: trn2 v0.8h, v0.8h, v1.8h
217213
define <8 x half> @trn2.v8f16(<8 x half> %v0, <8 x half> %v1) {
214+
; CHECK-LABEL: 'trn2.v8f16'
215+
; CHECK-NEXT: Cost Model: Found costs of 1 for: %tmp0 = shufflevector <8 x half> %v0, <8 x half> %v1, <8 x i32> <i32 1, i32 9, i32 3, i32 11, i32 5, i32 13, i32 7, i32 15>
216+
; CHECK-NEXT: Cost Model: Found costs of RThru:0 CodeSize:1 Lat:1 SizeLat:1 for: ret <8 x half> %tmp0
217+
;
218218
%tmp0 = shufflevector <8 x half> %v0, <8 x half> %v1, <8 x i32> <i32 1, i32 9, i32 3, i32 11, i32 5, i32 13, i32 7, i32 15>
219219
ret <8 x half> %tmp0
220220
}

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