44define i8 @add_and_sgt (i8 %x ) {
55; CHECK-LABEL: define i8 @add_and_sgt(
66; CHECK-SAME: i8 [[X:%.*]]) {
7- ; CHECK-NEXT: [[ADD:%.*]] = add nsw i8 [[X]], 16
8- ; CHECK-NEXT: [[CMP:%.*]] = icmp sgt i8 [[X]], 8
9- ; CHECK-NEXT: [[S:%.*]] = select i1 [[CMP]], i8 [[ADD]], i8 24
7+ ; CHECK-NEXT: [[TMP1:%.*]] = call i8 @llvm.smax.i8(i8 [[X]], i8 8)
8+ ; CHECK-NEXT: [[S:%.*]] = add nuw i8 [[TMP1]], 16
109; CHECK-NEXT: ret i8 [[S]]
1110;
1211 %add = add nsw i8 %x , 16
@@ -18,9 +17,8 @@ define i8 @add_and_sgt(i8 %x) {
1817define i8 @add_sgt_nuw (i8 %x ) {
1918; CHECK-LABEL: define i8 @add_sgt_nuw(
2019; CHECK-SAME: i8 [[X:%.*]]) {
21- ; CHECK-NEXT: [[ADD:%.*]] = add nuw i8 [[X]], 16
22- ; CHECK-NEXT: [[CMP:%.*]] = icmp sgt i8 [[X]], 8
23- ; CHECK-NEXT: [[S:%.*]] = select i1 [[CMP]], i8 [[ADD]], i8 24
20+ ; CHECK-NEXT: [[TMP1:%.*]] = call i8 @llvm.smax.i8(i8 [[X]], i8 8)
21+ ; CHECK-NEXT: [[S:%.*]] = add nuw i8 [[TMP1]], 16
2422; CHECK-NEXT: ret i8 [[S]]
2523;
2624 %add = add nuw i8 %x , 16
@@ -32,9 +30,8 @@ define i8 @add_sgt_nuw(i8 %x) {
3230define i8 @sub_and_ugt (i8 %x ) {
3331; CHECK-LABEL: define i8 @sub_and_ugt(
3432; CHECK-SAME: i8 [[X:%.*]]) {
35- ; CHECK-NEXT: [[SUB:%.*]] = add nsw i8 [[X]], -50
36- ; CHECK-NEXT: [[CMP:%.*]] = icmp ugt i8 [[X]], 100
37- ; CHECK-NEXT: [[S:%.*]] = select i1 [[CMP]], i8 50, i8 [[SUB]]
33+ ; CHECK-NEXT: [[TMP1:%.*]] = call i8 @llvm.umin.i8(i8 [[X]], i8 100)
34+ ; CHECK-NEXT: [[S:%.*]] = add nsw i8 [[TMP1]], -50
3835; CHECK-NEXT: ret i8 [[S]]
3936;
4037 %sub = sub nsw i8 %x , 50
@@ -46,9 +43,8 @@ define i8 @sub_and_ugt(i8 %x) {
4643define i8 @sub_ugt_nuw_nsw (i8 %x ) {
4744; CHECK-LABEL: define i8 @sub_ugt_nuw_nsw(
4845; CHECK-SAME: i8 [[X:%.*]]) {
49- ; CHECK-NEXT: [[SUB:%.*]] = add nsw i8 [[X]], -50
50- ; CHECK-NEXT: [[CMP:%.*]] = icmp ugt i8 [[X]], 100
51- ; CHECK-NEXT: [[S:%.*]] = select i1 [[CMP]], i8 50, i8 [[SUB]]
46+ ; CHECK-NEXT: [[TMP1:%.*]] = call i8 @llvm.umin.i8(i8 [[X]], i8 100)
47+ ; CHECK-NEXT: [[S:%.*]] = add nsw i8 [[TMP1]], -50
5248; CHECK-NEXT: ret i8 [[S]]
5349;
5450 %sub = sub nuw nsw i8 %x , 50
@@ -60,9 +56,8 @@ define i8 @sub_ugt_nuw_nsw(i8 %x) {
6056define i8 @mul_and_ult (i8 %x ) {
6157; CHECK-LABEL: define i8 @mul_and_ult(
6258; CHECK-SAME: i8 [[X:%.*]]) {
63- ; CHECK-NEXT: [[ADD:%.*]] = mul nsw i8 [[X]], 10
64- ; CHECK-NEXT: [[CMP:%.*]] = icmp ugt i8 [[X]], 10
65- ; CHECK-NEXT: [[S:%.*]] = select i1 [[CMP]], i8 100, i8 [[ADD]]
59+ ; CHECK-NEXT: [[TMP1:%.*]] = call i8 @llvm.umin.i8(i8 [[X]], i8 10)
60+ ; CHECK-NEXT: [[S:%.*]] = mul nuw i8 [[TMP1]], 10
6661; CHECK-NEXT: ret i8 [[S]]
6762;
6863 %add = mul nsw i8 %x , 10
@@ -74,9 +69,8 @@ define i8 @mul_and_ult(i8 %x) {
7469define i8 @mul_ult_noflags (i8 %x ) {
7570; CHECK-LABEL: define i8 @mul_ult_noflags(
7671; CHECK-SAME: i8 [[X:%.*]]) {
77- ; CHECK-NEXT: [[ADD:%.*]] = mul i8 [[X]], 10
78- ; CHECK-NEXT: [[CMP:%.*]] = icmp ugt i8 [[X]], 10
79- ; CHECK-NEXT: [[S:%.*]] = select i1 [[CMP]], i8 100, i8 [[ADD]]
72+ ; CHECK-NEXT: [[TMP1:%.*]] = call i8 @llvm.umin.i8(i8 [[X]], i8 10)
73+ ; CHECK-NEXT: [[S:%.*]] = mul nuw i8 [[TMP1]], 10
8074; CHECK-NEXT: ret i8 [[S]]
8175;
8276 %add = mul i8 %x , 10
@@ -88,9 +82,8 @@ define i8 @mul_ult_noflags(i8 %x) {
8882define i8 @udiv_and_slt (i8 %x ) {
8983; CHECK-LABEL: define i8 @udiv_and_slt(
9084; CHECK-SAME: i8 [[X:%.*]]) {
91- ; CHECK-NEXT: [[SUB:%.*]] = udiv i8 [[X]], 10
92- ; CHECK-NEXT: [[CMP:%.*]] = icmp slt i8 [[X]], 100
93- ; CHECK-NEXT: [[S:%.*]] = select i1 [[CMP]], i8 10, i8 [[SUB]]
85+ ; CHECK-NEXT: [[TMP1:%.*]] = call i8 @llvm.smax.i8(i8 [[X]], i8 100)
86+ ; CHECK-NEXT: [[S:%.*]] = udiv i8 [[TMP1]], 10
9487; CHECK-NEXT: ret i8 [[S]]
9588;
9689 %sub = udiv i8 %x , 10
@@ -102,9 +95,8 @@ define i8 @udiv_and_slt(i8 %x) {
10295define i8 @udiv_slt_exact (i8 %x ) {
10396; CHECK-LABEL: define i8 @udiv_slt_exact(
10497; CHECK-SAME: i8 [[X:%.*]]) {
105- ; CHECK-NEXT: [[SUB:%.*]] = udiv exact i8 [[X]], 10
106- ; CHECK-NEXT: [[CMP:%.*]] = icmp slt i8 [[X]], 100
107- ; CHECK-NEXT: [[S:%.*]] = select i1 [[CMP]], i8 10, i8 [[SUB]]
98+ ; CHECK-NEXT: [[TMP1:%.*]] = call i8 @llvm.smax.i8(i8 [[X]], i8 100)
99+ ; CHECK-NEXT: [[S:%.*]] = udiv i8 [[TMP1]], 10
108100; CHECK-NEXT: ret i8 [[S]]
109101;
110102 %sub = udiv exact i8 %x , 10
@@ -116,9 +108,8 @@ define i8 @udiv_slt_exact(i8 %x) {
116108define i8 @canonicalize_icmp_operands (i8 %x ) {
117109; CHECK-LABEL: define i8 @canonicalize_icmp_operands(
118110; CHECK-SAME: i8 [[X:%.*]]) {
119- ; CHECK-NEXT: [[ADD:%.*]] = add nsw i8 [[X]], 8
120- ; CHECK-NEXT: [[CMP:%.*]] = icmp sgt i8 [[X]], 119
121- ; CHECK-NEXT: [[S:%.*]] = select i1 [[CMP]], i8 127, i8 [[ADD]]
111+ ; CHECK-NEXT: [[TMP1:%.*]] = call i8 @llvm.smin.i8(i8 [[X]], i8 119)
112+ ; CHECK-NEXT: [[S:%.*]] = add nsw i8 [[TMP1]], 8
122113; CHECK-NEXT: ret i8 [[S]]
123114;
124115 %add = add nsw i8 %x , 8
@@ -133,10 +124,10 @@ declare void @use_byte(i8)
133124define i8 @multi_use_cond_and_sel (i8 %x ) {
134125; CHECK-LABEL: define i8 @multi_use_cond_and_sel(
135126; CHECK-SAME: i8 [[X:%.*]]) {
136- ; CHECK-NEXT: [[ADD:%.*]] = add nsw i8 [[X]], 16
137127; CHECK-NEXT: [[CMP:%.*]] = icmp sgt i8 [[X]], 8
138128; CHECK-NEXT: call void @use(i1 [[CMP]])
139- ; CHECK-NEXT: [[S:%.*]] = select i1 [[CMP]], i8 [[ADD]], i8 24
129+ ; CHECK-NEXT: [[TMP1:%.*]] = call i8 @llvm.smax.i8(i8 [[X]], i8 8)
130+ ; CHECK-NEXT: [[S:%.*]] = add nuw i8 [[TMP1]], 16
140131; CHECK-NEXT: call void @use_byte(i8 [[S]])
141132; CHECK-NEXT: ret i8 [[S]]
142133;
@@ -155,11 +146,9 @@ define void @rust_noop_loop() {
155146; CHECK: [[BB2_I]]:
156147; CHECK-NEXT: [[ITER_SROA_0_07:%.*]] = phi i32 [ 0, %[[START]] ], [ [[SPEC_SELECT5:%.*]], %[[BB2_I]] ]
157148; CHECK-NEXT: [[_0_I3_I:%.*]] = icmp sgt i32 [[ITER_SROA_0_07]], 99
158- ; CHECK-NEXT: [[TMP0:%.*]] = add nsw i32 [[ITER_SROA_0_07]], 1
159- ; CHECK-NEXT: [[SPEC_SELECT5]] = select i1 [[_0_I3_I]], i32 100, i32 [[TMP0]]
160- ; CHECK-NEXT: [[_0_I_NOT_I:%.*]] = icmp sgt i32 [[SPEC_SELECT5]], 100
161- ; CHECK-NEXT: [[OR_COND:%.*]] = select i1 [[_0_I3_I]], i1 true, i1 [[_0_I_NOT_I]]
162- ; CHECK-NEXT: br i1 [[OR_COND]], label %[[BASICBLOCK4:.*]], label %[[BB2_I]]
149+ ; CHECK-NEXT: [[TMP0:%.*]] = call i32 @llvm.smin.i32(i32 [[ITER_SROA_0_07]], i32 99)
150+ ; CHECK-NEXT: [[SPEC_SELECT5]] = add nsw i32 [[TMP0]], 1
151+ ; CHECK-NEXT: br i1 [[_0_I3_I]], label %[[BASICBLOCK4:.*]], label %[[BB2_I]]
163152; CHECK: [[BASICBLOCK4]]:
164153; CHECK-NEXT: ret void
165154;
@@ -182,9 +171,8 @@ basicblock4:
182171define <2 x i8 > @add_non_splat_vector (<2 x i8 > %x ) {
183172; CHECK-LABEL: define <2 x i8> @add_non_splat_vector(
184173; CHECK-SAME: <2 x i8> [[X:%.*]]) {
185- ; CHECK-NEXT: [[ADD:%.*]] = add <2 x i8> [[X]], <i8 1, i8 0>
186- ; CHECK-NEXT: [[CMP:%.*]] = icmp sgt <2 x i8> [[X]], <i8 0, i8 1>
187- ; CHECK-NEXT: [[S:%.*]] = select <2 x i1> [[CMP]], <2 x i8> [[ADD]], <2 x i8> splat (i8 1)
174+ ; CHECK-NEXT: [[TMP1:%.*]] = call <2 x i8> @llvm.smax.v2i8(<2 x i8> [[X]], <2 x i8> <i8 0, i8 1>)
175+ ; CHECK-NEXT: [[S:%.*]] = add nuw <2 x i8> [[TMP1]], <i8 1, i8 0>
188176; CHECK-NEXT: ret <2 x i8> [[S]]
189177;
190178 %add = add <2 x i8 > %x , <i8 1 , i8 0 >
@@ -196,9 +184,8 @@ define <2 x i8> @add_non_splat_vector(<2 x i8> %x) {
196184define <2 x i8 > @or_splat_vector (<2 x i8 > %x ) {
197185; CHECK-LABEL: define <2 x i8> @or_splat_vector(
198186; CHECK-SAME: <2 x i8> [[X:%.*]]) {
199- ; CHECK-NEXT: [[ADD:%.*]] = or <2 x i8> [[X]], splat (i8 1)
200- ; CHECK-NEXT: [[CMP_INV:%.*]] = icmp slt <2 x i8> [[X]], splat (i8 1)
201- ; CHECK-NEXT: [[S:%.*]] = select <2 x i1> [[CMP_INV]], <2 x i8> splat (i8 1), <2 x i8> [[ADD]]
187+ ; CHECK-NEXT: [[TMP1:%.*]] = call <2 x i8> @llvm.smax.v2i8(<2 x i8> [[X]], <2 x i8> splat (i8 1))
188+ ; CHECK-NEXT: [[S:%.*]] = or <2 x i8> [[TMP1]], splat (i8 1)
202189; CHECK-NEXT: ret <2 x i8> [[S]]
203190;
204191 %add = or <2 x i8 > %x , <i8 1 , i8 1 >
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