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[X86] IsNOT - cleanup comments for each match. NFC.
Preparation for a refactor of IsNOT to better handle oneuse cases - move comments next to each match.
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llvm/lib/Target/X86/X86ISelLowering.cpp

Lines changed: 15 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -5207,18 +5207,19 @@ static bool isConstantPowerOf2(SDValue V, unsigned EltSizeInBIts,
52075207
return IsPow2OrUndef;
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}
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5210-
// Match not(xor X, -1) -> X.
5211-
// Match not(pcmpgt(C, X)) -> pcmpgt(X, C - 1).
5212-
// Match not(extract_subvector(xor X, -1)) -> extract_subvector(X).
5213-
// Match not(concat_vectors(xor X, -1, xor Y, -1)) -> concat_vectors(X, Y).
5214-
// Match or(not(X),not(Y)) -> and(X, Y).
5210+
// Helper to attempt to return a cheaper, bit-inverted version of \p V.
52155211
static SDValue IsNOT(SDValue V, SelectionDAG &DAG) {
5212+
// TODO: don't always ignore oneuse constraints.
52165213
V = peekThroughBitcasts(V);
52175214
EVT VT = V.getValueType();
5215+
5216+
// Match not(xor X, -1) -> X.
52185217
if (V.getOpcode() == ISD::XOR &&
52195218
(ISD::isBuildVectorAllOnes(V.getOperand(1).getNode()) ||
52205219
isAllOnesConstant(V.getOperand(1))))
52215220
return V.getOperand(0);
5221+
5222+
// Match not(extract_subvector(not(X)) -> extract_subvector(X).
52225223
if (V.getOpcode() == ISD::EXTRACT_SUBVECTOR &&
52235224
(isNullConstant(V.getOperand(1)) || V.getOperand(0).hasOneUse())) {
52245225
if (SDValue Not = IsNOT(V.getOperand(0), DAG)) {
@@ -5227,6 +5228,8 @@ static SDValue IsNOT(SDValue V, SelectionDAG &DAG) {
52275228
V.getOperand(1));
52285229
}
52295230
}
5231+
5232+
// Match not(pcmpgt(C, X)) -> pcmpgt(X, C - 1).
52305233
if (V.getOpcode() == X86ISD::PCMPGT &&
52315234
!ISD::isBuildVectorAllZeros(V.getOperand(0).getNode()) &&
52325235
!ISD::isBuildVectorAllOnes(V.getOperand(0).getNode()) &&
@@ -5250,15 +5253,20 @@ static SDValue IsNOT(SDValue V, SelectionDAG &DAG) {
52505253
}
52515254
}
52525255
}
5256+
5257+
// Match not(concat_vectors(not(X), not(Y))) -> concat_vectors(X, Y).
52535258
SmallVector<SDValue, 2> CatOps;
52545259
if (collectConcatOps(V.getNode(), CatOps, DAG)) {
52555260
for (SDValue &CatOp : CatOps) {
52565261
SDValue NotCat = IsNOT(CatOp, DAG);
5257-
if (!NotCat) return SDValue();
5262+
if (!NotCat)
5263+
return SDValue();
52585264
CatOp = DAG.getBitcast(CatOp.getValueType(), NotCat);
52595265
}
52605266
return DAG.getNode(ISD::CONCAT_VECTORS, SDLoc(V), VT, CatOps);
52615267
}
5268+
5269+
// Match not(or(not(X),not(Y))) -> and(X, Y).
52625270
if (V.getOpcode() == ISD::OR && DAG.getTargetLoweringInfo().isTypeLegal(VT) &&
52635271
V.getOperand(0).hasOneUse() && V.getOperand(1).hasOneUse()) {
52645272
// TODO: Handle cases with single NOT operand -> ANDNP
@@ -5267,6 +5275,7 @@ static SDValue IsNOT(SDValue V, SelectionDAG &DAG) {
52675275
return DAG.getNode(ISD::AND, SDLoc(V), VT, DAG.getBitcast(VT, Op0),
52685276
DAG.getBitcast(VT, Op1));
52695277
}
5278+
52705279
return SDValue();
52715280
}
52725281

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