@@ -300,3 +300,237 @@ define void @self-reference() {
300300end:
301301 ret void
302302}
303+
304+ @a = external dso_local global ptr , align 8
305+ @b = external dso_local global i32 , align 4
306+ @c = external dso_local global i64 , align 8
307+ @d = external dso_local global i16 , align 2
308+ @e = external dso_local global i64 , align 8
309+ @f = external dso_local global i32 , align 4
310+ @g = external dso_local global i64 , align 8
311+ @h = external dso_local global i32 , align 4
312+ @i = external dso_local global ptr , align 8
313+
314+ define void @pr106083_invalidBBarg_fold () {
315+ ; CHECK-LABEL: @pr106083_invalidBBarg_fold(
316+ ; CHECK-NEXT: [[TMP1:%.*]] = load i32, ptr @h, align 4
317+ ; CHECK-NEXT: [[DOTNOT2:%.*]] = icmp eq i32 [[TMP1]], 0
318+ ; CHECK-NEXT: [[D_PROMOTED3:%.*]] = load i16, ptr @d, align 1
319+ ; CHECK-NEXT: br i1 [[DOTNOT2]], label [[BB0:%.*]], label [[DOT_SI_UNFOLD_FALSE:%.*]]
320+ ; CHECK: BB0.loopexit:
321+ ; CHECK-NEXT: [[D_PROMOTED41:%.*]] = phi i16 [ [[D_PROMOTED4_JT2:%.*]], [[BB7_JT2:%.*]] ], [ [[D_PROMOTED4:%.*]], [[BB7:%.*]] ]
322+ ; CHECK-NEXT: br label [[BB0]]
323+ ; CHECK: ..si.unfold.false:
324+ ; CHECK-NEXT: [[DOTSI_UNFOLD_PHI:%.*]] = phi i32 [ 6, [[TMP0:%.*]] ]
325+ ; CHECK-NEXT: br label [[BB0]]
326+ ; CHECK: BB0:
327+ ; CHECK-NEXT: [[D_PROMOTED6:%.*]] = phi i16 [ [[D_PROMOTED3]], [[TMP0]] ], [ [[D_PROMOTED41]], [[BB0_LOOPEXIT:%.*]] ], [ [[D_PROMOTED3]], [[DOT_SI_UNFOLD_FALSE]] ]
328+ ; CHECK-NEXT: [[DOT_SI_UNFOLD_PHI:%.*]] = phi i32 [ [[DOT_SI_UNFOLD_PHI]], [[BB0_LOOPEXIT]] ], [ 0, [[TMP0]] ], [ [[DOTSI_UNFOLD_PHI]], [[DOT_SI_UNFOLD_FALSE]] ]
329+ ; CHECK-NEXT: br label [[BB1_JT2:%.*]]
330+ ; CHECK: BB1:
331+ ; CHECK-NEXT: [[D_PROMOTED5:%.*]] = phi i16 [ [[D_PROMOTED4]], [[BB1_BACKEDGE:%.*]] ]
332+ ; CHECK-NEXT: [[TMP2:%.*]] = phi i16 [ [[TMP10:%.*]], [[BB1_BACKEDGE]] ]
333+ ; CHECK-NEXT: [[DOT1:%.*]] = phi i32 [ [[DOT3:%.*]], [[BB1_BACKEDGE]] ]
334+ ; CHECK-NEXT: [[TMP3:%.*]] = load volatile i32, ptr @f, align 4
335+ ; CHECK-NEXT: [[DOTNOT:%.*]] = icmp eq i32 [[TMP3]], 0
336+ ; CHECK-NEXT: br i1 [[DOTNOT]], label [[BB7]], label [[BB2:%.*]]
337+ ; CHECK: BB1.jt2:
338+ ; CHECK-NEXT: [[D_PROMOTED5_JT2:%.*]] = phi i16 [ [[D_PROMOTED6]], [[BB0]] ]
339+ ; CHECK-NEXT: [[TMP4:%.*]] = phi i16 [ [[D_PROMOTED6]], [[BB0]] ]
340+ ; CHECK-NEXT: [[DOT1_JT2:%.*]] = phi i32 [ 2, [[BB0]] ]
341+ ; CHECK-NEXT: [[TMP5:%.*]] = load volatile i32, ptr @f, align 4
342+ ; CHECK-NEXT: [[DOTNOT_JT2:%.*]] = icmp eq i32 [[TMP5]], 0
343+ ; CHECK-NEXT: br i1 [[DOTNOT_JT2]], label [[BB7_JT2]], label [[BB2_JT2:%.*]]
344+ ; CHECK: BB2:
345+ ; CHECK-NEXT: [[TMP6:%.*]] = add i16 [[TMP2]], 1
346+ ; CHECK-NEXT: store i16 [[TMP6]], ptr @d, align 2
347+ ; CHECK-NEXT: [[TMP7:%.*]] = load volatile i64, ptr @g, align 8
348+ ; CHECK-NEXT: [[DOTNOT1:%.*]] = icmp eq i64 [[TMP7]], 0
349+ ; CHECK-NEXT: br i1 [[DOTNOT1]], label [[BB7]], label [[SPEC_SELECT_SI_UNFOLD_FALSE:%.*]]
350+ ; CHECK: BB2.jt2:
351+ ; CHECK-NEXT: [[TMP8:%.*]] = add i16 [[TMP4]], 1
352+ ; CHECK-NEXT: store i16 [[TMP8]], ptr @d, align 2
353+ ; CHECK-NEXT: [[TMP9:%.*]] = load volatile i64, ptr @g, align 8
354+ ; CHECK-NEXT: [[DOTNOT1_JT2:%.*]] = icmp eq i64 [[TMP9]], 0
355+ ; CHECK-NEXT: br i1 [[DOTNOT1_JT2]], label [[BB7]], label [[SPEC_SELECT_SI_UNFOLD_FALSE_JT2:%.*]]
356+ ; CHECK: spec.select.si.unfold.false:
357+ ; CHECK-NEXT: [[DOT1_SI_UNFOLD_PHI:%.*]] = phi i32 [ [[DOT1]], [[BB2]] ]
358+ ; CHECK-NEXT: br label [[BB7]]
359+ ; CHECK: spec.select.si.unfold.false.jt2:
360+ ; CHECK-NEXT: [[DOT1_SI_UNFOLD_PHI_JT2:%.*]] = phi i32 [ [[DOT1_JT2]], [[BB2_JT2]] ]
361+ ; CHECK-NEXT: br label [[BB7_JT2]]
362+ ; CHECK: BB7:
363+ ; CHECK-NEXT: [[D_PROMOTED4]] = phi i16 [ [[D_PROMOTED5]], [[BB1:%.*]] ], [ [[TMP6]], [[BB2]] ], [ [[TMP6]], [[SPEC_SELECT_SI_UNFOLD_FALSE]] ], [ [[TMP8]], [[BB2_JT2]] ]
364+ ; CHECK-NEXT: [[TMP10]] = phi i16 [ [[TMP2]], [[BB1]] ], [ [[TMP6]], [[BB2]] ], [ [[TMP6]], [[SPEC_SELECT_SI_UNFOLD_FALSE]] ], [ [[TMP8]], [[BB2_JT2]] ]
365+ ; CHECK-NEXT: [[DOT3]] = phi i32 [ [[DOT1]], [[BB1]] ], [ [[DOT_SI_UNFOLD_PHI]], [[BB2]] ], [ [[DOT1_SI_UNFOLD_PHI]], [[SPEC_SELECT_SI_UNFOLD_FALSE]] ], [ [[DOT_SI_UNFOLD_PHI]], [[BB2_JT2]] ]
366+ ; CHECK-NEXT: switch i32 [[DOT3]], label [[BB9:%.*]] [
367+ ; CHECK-NEXT: i32 0, label [[BB1_BACKEDGE]]
368+ ; CHECK-NEXT: i32 7, label [[BB1_BACKEDGE]]
369+ ; CHECK-NEXT: i32 6, label [[BB8:%.*]]
370+ ; CHECK-NEXT: i32 2, label [[BB0_LOOPEXIT]]
371+ ; CHECK-NEXT: ]
372+ ; CHECK: BB7.jt2:
373+ ; CHECK-NEXT: [[D_PROMOTED4_JT2]] = phi i16 [ [[D_PROMOTED5_JT2]], [[BB1_JT2]] ], [ [[TMP8]], [[SPEC_SELECT_SI_UNFOLD_FALSE_JT2]] ]
374+ ; CHECK-NEXT: [[TMP11:%.*]] = phi i16 [ [[TMP4]], [[BB1_JT2]] ], [ [[TMP8]], [[SPEC_SELECT_SI_UNFOLD_FALSE_JT2]] ]
375+ ; CHECK-NEXT: [[DOT3_JT2:%.*]] = phi i32 [ [[DOT1_JT2]], [[BB1_JT2]] ], [ [[DOT1_SI_UNFOLD_PHI_JT2]], [[SPEC_SELECT_SI_UNFOLD_FALSE_JT2]] ]
376+ ; CHECK-NEXT: br label [[BB0_LOOPEXIT]]
377+ ; CHECK: BB1.backedge:
378+ ; CHECK-NEXT: br label [[BB1]]
379+ ; CHECK: BB8:
380+ ; CHECK-NEXT: ret void
381+ ; CHECK: BB9:
382+ ; CHECK-NEXT: unreachable
383+ ;
384+ %1 = load i32 , ptr @h , align 4
385+ %.not2 = icmp eq i32 %1 , 0
386+ %. = select i1 %.not2 , i32 0 , i32 6
387+ %d.promoted3 = load i16 , ptr @d , align 1
388+ br label %BB0
389+
390+ BB0.loopexit: ; preds = %BB7
391+ br label %BB0
392+
393+ BB0: ; preds = %BB0.loopexit, %0
394+ %d.promoted6 = phi i16 [ %d.promoted3 , %0 ], [ %d.promoted4 , %BB0.loopexit ]
395+ br label %BB1
396+
397+ BB1: ; preds = %BB1.backedge, %BB0
398+ %d.promoted5 = phi i16 [ %d.promoted6 , %BB0 ], [ %d.promoted4 , %BB1.backedge ]
399+ %2 = phi i16 [ %d.promoted6 , %BB0 ], [ %6 , %BB1.backedge ]
400+ %.1 = phi i32 [ 2 , %BB0 ], [ %.3 , %BB1.backedge ]
401+ %3 = load volatile i32 , ptr @f , align 4
402+ %.not = icmp eq i32 %3 , 0
403+ br i1 %.not , label %BB7 , label %BB2
404+
405+ BB2: ; preds = %BB1
406+ %4 = add i16 %2 , 1
407+ store i16 %4 , ptr @d , align 2
408+ %5 = load volatile i64 , ptr @g , align 8
409+ %.not1 = icmp eq i64 %5 , 0
410+ %spec.select = select i1 %.not1 , i32 %. , i32 %.1
411+ br label %BB7
412+
413+ BB7: ; preds = %BB2, %BB1
414+ %d.promoted4 = phi i16 [ %d.promoted5 , %BB1 ], [ %4 , %BB2 ]
415+ %6 = phi i16 [ %2 , %BB1 ], [ %4 , %BB2 ]
416+ %.3 = phi i32 [ %.1 , %BB1 ], [ %spec.select , %BB2 ]
417+ switch i32 %.3 , label %BB9 [
418+ i32 0 , label %BB1.backedge
419+ i32 7 , label %BB1.backedge
420+ i32 6 , label %BB8
421+ i32 2 , label %BB0.loopexit
422+ ]
423+
424+ BB1.backedge: ; preds = %BB7, %BB7
425+ br label %BB1
426+
427+ BB8: ; preds = %BB7
428+ ret void
429+
430+ BB9: ; preds = %BB7
431+ unreachable
432+ }
433+
434+
435+ define void @pr106083_select_dead_uses () {
436+ ; CHECK-LABEL: @pr106083_select_dead_uses(
437+ ; CHECK-NEXT: [[TMP1:%.*]] = load ptr, ptr @a, align 8
438+ ; CHECK-NEXT: [[TMP2:%.*]] = load ptr, ptr @i, align 8
439+ ; CHECK-NEXT: [[TMP3:%.*]] = load i64, ptr @c, align 8
440+ ; CHECK-NEXT: [[DOTNOT3:%.*]] = icmp eq i64 [[TMP3]], 0
441+ ; CHECK-NEXT: br i1 [[DOTNOT3]], label [[DOTLOOPEXIT6:%.*]], label [[SPEC_SELECT_SI_UNFOLD_FALSE:%.*]]
442+ ; CHECK: .loopexit6.loopexit:
443+ ; CHECK-NEXT: br label [[DOTLOOPEXIT6]]
444+ ; CHECK: spec.select.si.unfold.false:
445+ ; CHECK-NEXT: [[DOTSI_UNFOLD_PHI:%.*]] = phi i32 [ 2, [[TMP0:%.*]] ]
446+ ; CHECK-NEXT: br label [[DOTLOOPEXIT6]]
447+ ; CHECK: .loopexit6:
448+ ; CHECK-NEXT: [[SPEC_SELECT_SI_UNFOLD_PHI:%.*]] = phi i32 [ [[SPEC_SELECT_SI_UNFOLD_PHI]], [[DOTLOOPEXIT6_LOOPEXIT:%.*]] ], [ 0, [[TMP0]] ], [ [[DOTSI_UNFOLD_PHI]], [[SPEC_SELECT_SI_UNFOLD_FALSE]] ]
449+ ; CHECK-NEXT: br label [[TMP6:%.*]]
450+ ; CHECK: 4:
451+ ; CHECK-NEXT: [[DOT1:%.*]] = phi i32 [ [[DOT21:%.*]], [[DOTBACKEDGE:%.*]] ]
452+ ; CHECK-NEXT: [[TMP5:%.*]] = load i32, ptr [[TMP1]], align 4
453+ ; CHECK-NEXT: [[DOTNOT:%.*]] = icmp eq i32 [[TMP5]], 0
454+ ; CHECK-NEXT: br i1 [[DOTNOT]], label [[SELECT_UNFOLD_JT0:%.*]], label [[TMP8:%.*]]
455+ ; CHECK: 6:
456+ ; CHECK-NEXT: [[DOT1_JT2:%.*]] = phi i32 [ 2, [[DOTLOOPEXIT6]] ]
457+ ; CHECK-NEXT: [[TMP7:%.*]] = load i32, ptr [[TMP1]], align 4
458+ ; CHECK-NEXT: [[DOTNOT_JT2:%.*]] = icmp eq i32 [[TMP7]], 0
459+ ; CHECK-NEXT: br i1 [[DOTNOT_JT2]], label [[SELECT_UNFOLD_JT0]], label [[TMP10:%.*]]
460+ ; CHECK: 8:
461+ ; CHECK-NEXT: [[TMP9:%.*]] = load i32, ptr [[TMP2]], align 4
462+ ; CHECK-NEXT: [[DOTNOT2:%.*]] = icmp eq i32 [[TMP9]], 0
463+ ; CHECK-NEXT: br i1 [[DOTNOT2]], label [[SELECT_UNFOLD:%.*]], label [[SPEC_SELECT7_SI_UNFOLD_FALSE:%.*]]
464+ ; CHECK: 10:
465+ ; CHECK-NEXT: [[TMP11:%.*]] = load i32, ptr [[TMP2]], align 4
466+ ; CHECK-NEXT: [[DOTNOT2_JT2:%.*]] = icmp eq i32 [[TMP11]], 0
467+ ; CHECK-NEXT: br i1 [[DOTNOT2_JT2]], label [[SELECT_UNFOLD]], label [[SPEC_SELECT7_SI_UNFOLD_FALSE_JT2:%.*]]
468+ ; CHECK: spec.select7.si.unfold.false:
469+ ; CHECK-NEXT: [[DOT1_SI_UNFOLD_PHI:%.*]] = phi i32 [ [[DOT1]], [[TMP8]] ]
470+ ; CHECK-NEXT: br label [[SELECT_UNFOLD]]
471+ ; CHECK: spec.select7.si.unfold.false.jt2:
472+ ; CHECK-NEXT: [[DOT1_SI_UNFOLD_PHI_JT2:%.*]] = phi i32 [ [[DOT1_JT2]], [[TMP10]] ]
473+ ; CHECK-NEXT: br label [[SELECT_UNFOLD_JT2:%.*]]
474+ ; CHECK: select.unfold:
475+ ; CHECK-NEXT: [[DOT2:%.*]] = phi i32 [ [[SPEC_SELECT_SI_UNFOLD_PHI]], [[TMP8]] ], [ [[DOT1_SI_UNFOLD_PHI]], [[SPEC_SELECT7_SI_UNFOLD_FALSE]] ], [ [[SPEC_SELECT_SI_UNFOLD_PHI]], [[TMP10]] ]
476+ ; CHECK-NEXT: switch i32 [[DOT2]], label [[TMP12:%.*]] [
477+ ; CHECK-NEXT: i32 0, label [[DOTPREHEADER_PREHEADER:%.*]]
478+ ; CHECK-NEXT: i32 2, label [[DOTLOOPEXIT6_LOOPEXIT]]
479+ ; CHECK-NEXT: ]
480+ ; CHECK: select.unfold.jt2:
481+ ; CHECK-NEXT: [[DOT2_JT2:%.*]] = phi i32 [ [[DOT1_SI_UNFOLD_PHI_JT2]], [[SPEC_SELECT7_SI_UNFOLD_FALSE_JT2]] ]
482+ ; CHECK-NEXT: br label [[DOTLOOPEXIT6_LOOPEXIT]]
483+ ; CHECK: select.unfold.jt0:
484+ ; CHECK-NEXT: [[DOT2_JT0:%.*]] = phi i32 [ 0, [[TMP4:%.*]] ], [ 0, [[TMP6]] ]
485+ ; CHECK-NEXT: br label [[DOTPREHEADER_PREHEADER]]
486+ ; CHECK: .preheader.preheader:
487+ ; CHECK-NEXT: [[DOT21]] = phi i32 [ [[DOT2_JT0]], [[SELECT_UNFOLD_JT0]] ], [ [[DOT2]], [[SELECT_UNFOLD]] ]
488+ ; CHECK-NEXT: store i32 0, ptr @b, align 4
489+ ; CHECK-NEXT: br label [[DOTBACKEDGE]]
490+ ; CHECK: .backedge:
491+ ; CHECK-NEXT: br label [[TMP4]]
492+ ; CHECK: 12:
493+ ; CHECK-NEXT: unreachable
494+ ;
495+ %1 = load ptr , ptr @a , align 8
496+ %2 = load ptr , ptr @i , align 8
497+ %3 = load i64 , ptr @c , align 8
498+ %.not3 = icmp eq i64 %3 , 0
499+ %spec.select = select i1 %.not3 , i32 0 , i32 2
500+ br label %.loopexit6
501+
502+ .loopexit6.loopexit: ; preds = %select.unfold
503+ br label %.loopexit6
504+
505+ .loopexit6: ; preds = %.loopexit6.loopexit, %0
506+ br label %4
507+
508+ 4 : ; preds = %.backedge, %.loopexit6
509+ %.1 = phi i32 [ 2 , %.loopexit6 ], [ %.2 , %.backedge ]
510+ %5 = load i32 , ptr %1 , align 4
511+ %.not = icmp eq i32 %5 , 0
512+ br i1 %.not , label %select.unfold , label %6
513+
514+ 6 : ; preds = %4
515+ %7 = load i32 , ptr %2 , align 4
516+ %.not2 = icmp eq i32 %7 , 0
517+ %spec.select7 = select i1 %.not2 , i32 %spec.select , i32 %.1
518+ br label %select.unfold
519+
520+ select .unfold: ; preds = %6, %4
521+ %.2 = phi i32 [ 0 , %4 ], [ %spec.select7 , %6 ]
522+ switch i32 %.2 , label %8 [
523+ i32 0 , label %.preheader.preheader
524+ i32 2 , label %.loopexit6.loopexit
525+ ]
526+
527+ .preheader.preheader: ; preds = %select.unfold
528+ store i32 0 , ptr @b , align 4
529+ br label %.backedge
530+
531+ .backedge: ; preds = %.preheader.preheader
532+ br label %4
533+
534+ 8 : ; preds = %select.unfold
535+ unreachable
536+ }
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