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lines changed Original file line number Diff line number Diff line change 1010// instructions are inserted.
1111//
1212// The purpose of this optimization is to make the VL argument, for instructions
13- // that have a VL argument, as small as possible. This is implemented by
14- // visiting each instruction in reverse order and checking that if it has a VL
15- // argument, whether the VL can be reduced.
13+ // that have a VL argument, as small as possible.
14+ //
15+ // This is split into a sparse dataflow analysis where we determine what VL is
16+ // demanded by each instruction first, and then afterwards try to reduce the VL
17+ // of each instruction if it demands less than its VL operand.
18+ //
19+ // The analysis is explained in more detail in the 2025 EuroLLVM Developers'
20+ // Meeting talk "Accidental Dataflow Analysis: Extending the RISC-V VL
21+ // Optimizer", which is available on YouTube at
22+ // https://www.youtube.com/watch?v=Mfb5fRSdJAc
23+ //
24+ // The slides for the talk are available at
25+ // https://llvm.org/devmtg/2025-04/slides/technical_talk/lau_accidental_dataflow.pdf
1626//
1727// ===---------------------------------------------------------------------===//
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