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[SelectionDAG] Pass SDValue to InstrEmitter::EmitCopyFromReg. NFC (#153485)
Instead of passing SDNode and ResNo separately. This allows us to use SDValue::operator== and avoid creating SDValue from the operands inside the function.
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+14
-19
lines changed

2 files changed

+14
-19
lines changed

llvm/lib/CodeGen/SelectionDAG/InstrEmitter.cpp

Lines changed: 12 additions & 17 deletions
Original file line numberDiff line numberDiff line change
@@ -81,12 +81,11 @@ static unsigned countOperands(SDNode *Node, unsigned NumExpUses,
8181

8282
/// EmitCopyFromReg - Generate machine code for an CopyFromReg node or an
8383
/// implicit physical register output.
84-
void InstrEmitter::EmitCopyFromReg(SDNode *Node, unsigned ResNo, bool IsClone,
85-
Register SrcReg, VRBaseMapType &VRBaseMap) {
84+
void InstrEmitter::EmitCopyFromReg(SDValue Op, bool IsClone, Register SrcReg,
85+
VRBaseMapType &VRBaseMap) {
8686
Register VRBase;
8787
if (SrcReg.isVirtual()) {
8888
// Just use the input register directly!
89-
SDValue Op(Node, ResNo);
9089
if (IsClone)
9190
VRBaseMap.erase(Op);
9291
bool isNew = VRBaseMap.insert(std::make_pair(Op, SrcReg)).second;
@@ -99,17 +98,15 @@ void InstrEmitter::EmitCopyFromReg(SDNode *Node, unsigned ResNo, bool IsClone,
9998
// the CopyToReg'd destination register instead of creating a new vreg.
10099
bool MatchReg = true;
101100
const TargetRegisterClass *UseRC = nullptr;
102-
MVT VT = Node->getSimpleValueType(ResNo);
101+
MVT VT = Op.getSimpleValueType();
103102

104103
// Stick to the preferred register classes for legal types.
105104
if (TLI->isTypeLegal(VT))
106-
UseRC = TLI->getRegClassFor(VT, Node->isDivergent());
105+
UseRC = TLI->getRegClassFor(VT, Op->isDivergent());
107106

108-
for (SDNode *User : Node->users()) {
107+
for (SDNode *User : Op->users()) {
109108
bool Match = true;
110-
if (User->getOpcode() == ISD::CopyToReg &&
111-
User->getOperand(2).getNode() == Node &&
112-
User->getOperand(2).getResNo() == ResNo) {
109+
if (User->getOpcode() == ISD::CopyToReg && User->getOperand(2) == Op) {
113110
Register DestReg = cast<RegisterSDNode>(User->getOperand(1))->getReg();
114111
if (DestReg.isVirtual()) {
115112
VRBase = DestReg;
@@ -118,10 +115,8 @@ void InstrEmitter::EmitCopyFromReg(SDNode *Node, unsigned ResNo, bool IsClone,
118115
Match = false;
119116
} else {
120117
for (unsigned i = 0, e = User->getNumOperands(); i != e; ++i) {
121-
SDValue Op = User->getOperand(i);
122-
if (Op.getNode() != Node || Op.getResNo() != ResNo)
118+
if (User->getOperand(i) != Op)
123119
continue;
124-
MVT VT = Node->getSimpleValueType(Op.getResNo());
125120
if (VT == MVT::Other || VT == MVT::Glue)
126121
continue;
127122
Match = false;
@@ -170,11 +165,11 @@ void InstrEmitter::EmitCopyFromReg(SDNode *Node, unsigned ResNo, bool IsClone,
170165
} else {
171166
// Create the reg, emit the copy.
172167
VRBase = MRI->createVirtualRegister(DstRC);
173-
BuildMI(*MBB, InsertPos, Node->getDebugLoc(), TII->get(TargetOpcode::COPY),
174-
VRBase).addReg(SrcReg);
168+
BuildMI(*MBB, InsertPos, Op.getDebugLoc(), TII->get(TargetOpcode::COPY),
169+
VRBase)
170+
.addReg(SrcReg);
175171
}
176172

177-
SDValue Op(Node, ResNo);
178173
if (IsClone)
179174
VRBaseMap.erase(Op);
180175
bool isNew = VRBaseMap.insert(std::make_pair(Op, VRBase)).second;
@@ -1170,7 +1165,7 @@ EmitMachineNode(SDNode *Node, bool IsClone, bool IsCloned,
11701165
continue;
11711166
// This implicitly defined physreg has a use.
11721167
UsedRegs.push_back(Reg);
1173-
EmitCopyFromReg(Node, i, IsClone, Reg, VRBaseMap);
1168+
EmitCopyFromReg(SDValue(Node, i), IsClone, Reg, VRBaseMap);
11741169
}
11751170
}
11761171

@@ -1283,7 +1278,7 @@ EmitSpecialNode(SDNode *Node, bool IsClone, bool IsCloned,
12831278
}
12841279
case ISD::CopyFromReg: {
12851280
Register SrcReg = cast<RegisterSDNode>(Node->getOperand(1))->getReg();
1286-
EmitCopyFromReg(Node, 0, IsClone, SrcReg, VRBaseMap);
1281+
EmitCopyFromReg(SDValue(Node, 0), IsClone, SrcReg, VRBaseMap);
12871282
break;
12881283
}
12891284
case ISD::EH_LABEL:

llvm/lib/CodeGen/SelectionDAG/InstrEmitter.h

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -48,8 +48,8 @@ class LLVM_LIBRARY_VISIBILITY InstrEmitter {
4848

4949
/// EmitCopyFromReg - Generate machine code for an CopyFromReg node or an
5050
/// implicit physical register output.
51-
void EmitCopyFromReg(SDNode *Node, unsigned ResNo, bool IsClone,
52-
Register SrcReg, VRBaseMapType &VRBaseMap);
51+
void EmitCopyFromReg(SDValue Op, bool IsClone, Register SrcReg,
52+
VRBaseMapType &VRBaseMap);
5353

5454
void CreateVirtualRegisters(SDNode *Node,
5555
MachineInstrBuilder &MIB,

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