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indent the body in multiclass by 2 spaces.
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llvm/lib/Target/RISCV/RISCVInstrInfoZb.td

Lines changed: 43 additions & 44 deletions
Original file line numberDiff line numberDiff line change
@@ -660,15 +660,15 @@ let Predicates = [HasStdExtZbkb, NoStdExtZbb, IsRV64] in
660660
def : Pat<(i64 (and GPR:$rs, 0xFFFF)), (PACKW GPR:$rs, (XLenVT X0))>;
661661

662662
multiclass ShxAddPat<int i, Instruction shxadd> {
663-
def : Pat<(XLenVT (add_like_non_imm12 (shl GPR:$rs1, (XLenVT i)), GPR:$rs2)),
664-
(shxadd GPR:$rs1, GPR:$rs2)>;
665-
def : Pat<(XLenVT (riscv_shl_add GPR:$rs1, (XLenVT i), GPR:$rs2)),
666-
(shxadd GPR:$rs1, GPR:$rs2)>;
667-
668-
defvar pat = !cast<ComplexPattern>("sh"#i#"add_op");
669-
// More complex cases use a ComplexPattern.
670-
def : Pat<(XLenVT (add_like_non_imm12 pat:$rs1, GPR:$rs2)),
671-
(shxadd pat:$rs1, GPR:$rs2)>;
663+
def : Pat<(XLenVT (add_like_non_imm12 (shl GPR:$rs1, (XLenVT i)), GPR:$rs2)),
664+
(shxadd GPR:$rs1, GPR:$rs2)>;
665+
def : Pat<(XLenVT (riscv_shl_add GPR:$rs1, (XLenVT i), GPR:$rs2)),
666+
(shxadd GPR:$rs1, GPR:$rs2)>;
667+
668+
defvar pat = !cast<ComplexPattern>("sh"#i#"add_op");
669+
// More complex cases use a ComplexPattern.
670+
def : Pat<(XLenVT (add_like_non_imm12 pat:$rs1, GPR:$rs2)),
671+
(shxadd pat:$rs1, GPR:$rs2)>;
672672
}
673673

674674
class CSImm12MulBy4Pat<Instruction sh2add>
@@ -682,7 +682,6 @@ class CSImm12MulBy8Pat<Instruction sh3add>
682682
GPR:$r)>;
683683

684684
let Predicates = [HasStdExtZba] in {
685-
686685
foreach i = {1,2,3} in {
687686
defvar shxadd = !cast<Instruction>("SH"#i#"ADD");
688687
defm : ShxAddPat<i, shxadd>;
@@ -693,52 +692,52 @@ def : CSImm12MulBy8Pat<SH3ADD>;
693692
} // Predicates = [HasStdExtZba]
694693

695694
multiclass ADD_UWPat<Instruction add_uw> {
696-
def : Pat<(i64 (add_like_non_imm12 (and GPR:$rs1, 0xFFFFFFFF), GPR:$rs2)),
697-
(add_uw GPR:$rs1, GPR:$rs2)>;
698-
def : Pat<(i64 (and GPR:$rs, 0xFFFFFFFF)), (add_uw GPR:$rs, (XLenVT X0))>;
695+
def : Pat<(i64 (add_like_non_imm12 (and GPR:$rs1, 0xFFFFFFFF), GPR:$rs2)),
696+
(add_uw GPR:$rs1, GPR:$rs2)>;
697+
def : Pat<(i64 (and GPR:$rs, 0xFFFFFFFF)), (add_uw GPR:$rs, (XLenVT X0))>;
699698
}
700699

701700
multiclass ShxAdd_UWPat<int i, Instruction shxadd_uw> {
702-
def : Pat<(i64 (add_like_non_imm12 (shl (and GPR:$rs1, 0xFFFFFFFF), (i64 i)),
703-
(XLenVT GPR:$rs2))),
704-
(shxadd_uw GPR:$rs1, GPR:$rs2)>;
705-
def : Pat<(i64 (riscv_shl_add (and GPR:$rs1, 0xFFFFFFFF), (i64 i), GPR:$rs2)),
706-
(shxadd_uw GPR:$rs1, GPR:$rs2)>;
707-
708-
defvar pat = !cast<ComplexPattern>("sh"#i#"add_uw_op");
709-
// More complex cases use a ComplexPattern.
710-
def : Pat<(i64 (add_like_non_imm12 pat:$rs1, (XLenVT GPR:$rs2))),
711-
(shxadd_uw pat:$rs1, GPR:$rs2)>;
701+
def : Pat<(i64 (add_like_non_imm12 (shl (and GPR:$rs1, 0xFFFFFFFF), (i64 i)),
702+
(XLenVT GPR:$rs2))),
703+
(shxadd_uw GPR:$rs1, GPR:$rs2)>;
704+
def : Pat<(i64 (riscv_shl_add (and GPR:$rs1, 0xFFFFFFFF), (i64 i), GPR:$rs2)),
705+
(shxadd_uw GPR:$rs1, GPR:$rs2)>;
706+
707+
defvar pat = !cast<ComplexPattern>("sh"#i#"add_uw_op");
708+
// More complex cases use a ComplexPattern.
709+
def : Pat<(i64 (add_like_non_imm12 pat:$rs1, (XLenVT GPR:$rs2))),
710+
(shxadd_uw pat:$rs1, GPR:$rs2)>;
712711
}
713712

714713
multiclass Sh1Add_UWPat<Instruction sh1add_uw> {
715-
def : Pat<(i64 (add_like_non_imm12 (and (shl GPR:$rs1, (i64 1)), 0x1FFFFFFFF),
716-
(XLenVT GPR:$rs2))),
717-
(sh1add_uw GPR:$rs1, GPR:$rs2)>;
718-
// Use SRLI to clear the LSBs and SHXADD_UW to mask and shift.
719-
def : Pat<(i64 (add_like_non_imm12 (and GPR:$rs1, 0x1FFFFFFFE),
720-
(XLenVT GPR:$rs2))),
721-
(sh1add_uw (XLenVT (SRLI GPR:$rs1, 1)), GPR:$rs2)>;
714+
def : Pat<(i64 (add_like_non_imm12 (and (shl GPR:$rs1, (i64 1)), 0x1FFFFFFFF),
715+
(XLenVT GPR:$rs2))),
716+
(sh1add_uw GPR:$rs1, GPR:$rs2)>;
717+
// Use SRLI to clear the LSBs and SHXADD_UW to mask and shift.
718+
def : Pat<(i64 (add_like_non_imm12 (and GPR:$rs1, 0x1FFFFFFFE),
719+
(XLenVT GPR:$rs2))),
720+
(sh1add_uw (XLenVT (SRLI GPR:$rs1, 1)), GPR:$rs2)>;
722721
}
723722

724723
multiclass Sh2Add_UWPat<Instruction sh2add_uw> {
725-
def : Pat<(i64 (add_like_non_imm12 (and (shl GPR:$rs1, (i64 2)), 0x3FFFFFFFF),
726-
(XLenVT GPR:$rs2))),
727-
(sh2add_uw GPR:$rs1, GPR:$rs2)>;
728-
// Use SRLI to clear the LSBs and SHXADD_UW to mask and shift.
729-
def : Pat<(i64 (add_like_non_imm12 (and GPR:$rs1, 0x3FFFFFFFC),
730-
(XLenVT GPR:$rs2))),
731-
(sh2add_uw (XLenVT (SRLI GPR:$rs1, 2)), GPR:$rs2)>;
724+
def : Pat<(i64 (add_like_non_imm12 (and (shl GPR:$rs1, (i64 2)), 0x3FFFFFFFF),
725+
(XLenVT GPR:$rs2))),
726+
(sh2add_uw GPR:$rs1, GPR:$rs2)>;
727+
// Use SRLI to clear the LSBs and SHXADD_UW to mask and shift.
728+
def : Pat<(i64 (add_like_non_imm12 (and GPR:$rs1, 0x3FFFFFFFC),
729+
(XLenVT GPR:$rs2))),
730+
(sh2add_uw (XLenVT (SRLI GPR:$rs1, 2)), GPR:$rs2)>;
732731
}
733732

734733
multiclass Sh3Add_UWPat<Instruction sh3add_uw> {
735-
def : Pat<(i64 (add_like_non_imm12 (and GPR:$rs1, 0xFFFFFFF8),
736-
(XLenVT GPR:$rs2))),
737-
(sh3add_uw (XLenVT (SRLIW GPR:$rs1, 3)), GPR:$rs2)>;
738-
// Use SRLI to clear the LSBs and SHXADD_UW to mask and shift.
739-
def : Pat<(i64 (add_like_non_imm12 (and GPR:$rs1, 0x7FFFFFFF8),
740-
(XLenVT GPR:$rs2))),
741-
(sh3add_uw (XLenVT (SRLI GPR:$rs1, 3)), GPR:$rs2)>;
734+
def : Pat<(i64 (add_like_non_imm12 (and GPR:$rs1, 0xFFFFFFF8),
735+
(XLenVT GPR:$rs2))),
736+
(sh3add_uw (XLenVT (SRLIW GPR:$rs1, 3)), GPR:$rs2)>;
737+
// Use SRLI to clear the LSBs and SHXADD_UW to mask and shift.
738+
def : Pat<(i64 (add_like_non_imm12 (and GPR:$rs1, 0x7FFFFFFF8),
739+
(XLenVT GPR:$rs2))),
740+
(sh3add_uw (XLenVT (SRLI GPR:$rs1, 3)), GPR:$rs2)>;
742741
}
743742

744743
class Sh1AddPat<Instruction sh1add>

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