44
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66; CHECK: define i32 @test_branch(i32 %X)
7- ; CHECK-NO : hlsl.controlflow.hint
7+ ; CHECK-NOT : hlsl.controlflow.hint
88; CHECK: br i1 %cmp, label %if.then, label %if.else, !dx.controlflow.hints [[HINT_BRANCH:![0-9]+]]
99define i32 @test_branch (i32 %X ) {
1010entry:
@@ -34,7 +34,7 @@ if.end: ; preds = %if.else, %if.then
3434
3535
3636; CHECK: define i32 @test_flatten(i32 %X)
37- ; CHECK-NO : hlsl.controlflow.hint
37+ ; CHECK-NOT : hlsl.controlflow.hint
3838; CHECK: br i1 %cmp, label %if.then, label %if.else, !dx.controlflow.hints [[HINT_FLATTEN:![0-9]+]]
3939define i32 @test_flatten (i32 %X ) {
4040entry:
@@ -64,8 +64,8 @@ if.end: ; preds = %if.else, %if.then
6464
6565
6666; CHECK: define i32 @test_no_attr(i32 %X)
67- ; CHECK-NO : hlsl.controlflow.hint
68- ; CHECK-NO : !dx.controlflow.hints
67+ ; CHECK-NOT : hlsl.controlflow.hint
68+ ; CHECK-NOT : !dx.controlflow.hints
6969define i32 @test_no_attr (i32 %X ) {
7070entry:
7171 %X.addr = alloca i32 , align 4
@@ -91,7 +91,7 @@ if.end: ; preds = %if.else, %if.then
9191 %3 = load i32 , ptr %resp , align 4
9292 ret i32 %3
9393}
94- ; CHECK-NO : hlsl.controlflow.hint
94+ ; CHECK-NOT : hlsl.controlflow.hint
9595; CHECK: [[HINT_BRANCH]] = !{!"dx.controlflow.hints", i32 1}
9696; CHECK: [[HINT_FLATTEN]] = !{!"dx.controlflow.hints", i32 2}
9797!0 = !{!"hlsl.controlflow.hint" , i32 1 }
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