Add empty test and change recursion

Author: davemgreen

clang/lib/CodeGen/Targets/AArch64.cpp

@@ -489,7 +489,7 @@ ABIArgInfo AArch64ABIInfo::classifyArgumentType(QualType Ty, bool IsVariadicFn,
     // If the Aggregate is made up of pointers, use an array of pointers for the
     // coerced type. This prevents having to convert ptr2int->int2ptr through
     // the call, allowing alias analysis to produce better code.
-    std::function<bool(QualType Ty)> ContainsOnlyPointers = [&](QualType Ty) {
+    auto ContainsOnlyPointers = [&](const auto &Self, QualType Ty) {
       if (isEmptyRecord(getContext(), Ty, true))
         return false;
       const RecordType *RT = Ty->getAs<RecordType>();
@@ -498,7 +498,7 @@ ABIArgInfo AArch64ABIInfo::classifyArgumentType(QualType Ty, bool IsVariadicFn,
       const RecordDecl *RD = RT->getDecl();
       if (const CXXRecordDecl *CXXRD = dyn_cast<CXXRecordDecl>(RD)) {
         for (const auto &I : CXXRD->bases())
-          if (!ContainsOnlyPointers(I.getType()))
+          if (!Self(Self, I.getType()))
             return false;
       }
       return all_of(RD->fields(), [&](FieldDecl *FD) {
@@ -507,21 +507,16 @@ ABIArgInfo AArch64ABIInfo::classifyArgumentType(QualType Ty, bool IsVariadicFn,
           FDTy = getContext().getBaseElementType(FDTy);
         return (FDTy->isPointerOrReferenceType() &&
                 getContext().getTypeSize(FDTy) == 64) ||
-               ContainsOnlyPointers(FDTy);
+               Self(Self, FDTy);
       });
     };
-    if (Alignment <= 64 && ContainsOnlyPointers(Ty)) {
-      assert((Size == 64 || Size == 128) &&
-             "Expected a 64 or 128bit struct containing pointers");
-      llvm::Type *PtrTy = llvm::PointerType::getUnqual(getVMContext());
-      if (Size == 128)
-        PtrTy = llvm::ArrayType::get(PtrTy, 2);
-      return ABIArgInfo::getDirect(PtrTy);
-    }
 
     // We use a pair of i64 for 16-byte aggregate with 8-byte alignment.
     // For aggregates with 16-byte alignment, we use i128.
     llvm::Type *BaseTy = llvm::Type::getIntNTy(getVMContext(), Alignment);
+    if ((Size == 64 || Size == 128) && Alignment == 64 &&
+        ContainsOnlyPointers(ContainsOnlyPointers, Ty))
+      BaseTy = llvm::PointerType::getUnqual(getVMContext());
     return ABIArgInfo::getDirect(
         Size == Alignment ? BaseTy
                           : llvm::ArrayType::get(BaseTy, Size / Alignment));

clang/test/CodeGen/AArch64/struct-coerce-using-ptr.cpp

@@ -571,3 +571,50 @@ struct SSpp_align16 {
 //
 void TSpp_align16(SSpp_align16 s) { *s.a.x = 1; }
 
+
+struct Sempty {
+};
+// CHECK-A64-LABEL: define dso_local void @_Z6Tempty6Sempty(
+// CHECK-A64-SAME: i8 [[S_COERCE:%.*]]) #[[ATTR0]] {
+// CHECK-A64-NEXT:  [[ENTRY:.*:]]
+// CHECK-A64-NEXT:    [[S:%.*]] = alloca [[STRUCT_SEMPTY:%.*]], align 1
+// CHECK-A64-NEXT:    [[COERCE_DIVE:%.*]] = getelementptr inbounds nuw [[STRUCT_SEMPTY]], ptr [[S]], i32 0, i32 0
+// CHECK-A64-NEXT:    store i8 [[S_COERCE]], ptr [[COERCE_DIVE]], align 1
+// CHECK-A64-NEXT:    ret void
+//
+// CHECK-A64_32-LABEL: define void @_Z6Tempty6Sempty(
+// CHECK-A64_32-SAME: i8 [[S_COERCE:%.*]]) #[[ATTR0]] {
+// CHECK-A64_32-NEXT:  [[ENTRY:.*:]]
+// CHECK-A64_32-NEXT:    [[S:%.*]] = alloca [[STRUCT_SEMPTY:%.*]], align 1
+// CHECK-A64_32-NEXT:    [[COERCE_DIVE:%.*]] = getelementptr inbounds nuw [[STRUCT_SEMPTY]], ptr [[S]], i32 0, i32 0
+// CHECK-A64_32-NEXT:    store i8 [[S_COERCE]], ptr [[COERCE_DIVE]], align 1
+// CHECK-A64_32-NEXT:    ret void
+//
+void Tempty(Sempty s) { }
+
+
+struct SpSempty {
+  Sempty y;
+  int *x;
+};
+// CHECK-A64-LABEL: define dso_local void @_Z8TpSempty8SpSempty(
+// CHECK-A64-SAME: [2 x i64] [[S_COERCE:%.*]]) #[[ATTR0]] {
+// CHECK-A64-NEXT:  [[ENTRY:.*:]]
+// CHECK-A64-NEXT:    [[S:%.*]] = alloca [[STRUCT_SPSEMPTY:%.*]], align 8
+// CHECK-A64-NEXT:    store [2 x i64] [[S_COERCE]], ptr [[S]], align 8
+// CHECK-A64-NEXT:    [[X:%.*]] = getelementptr inbounds nuw [[STRUCT_SPSEMPTY]], ptr [[S]], i32 0, i32 1
+// CHECK-A64-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[X]], align 8
+// CHECK-A64-NEXT:    store i32 1, ptr [[TMP0]], align 4
+// CHECK-A64-NEXT:    ret void
+//
+// CHECK-A64_32-LABEL: define void @_Z8TpSempty8SpSempty(
+// CHECK-A64_32-SAME: i64 [[S_COERCE:%.*]]) #[[ATTR0]] {
+// CHECK-A64_32-NEXT:  [[ENTRY:.*:]]
+// CHECK-A64_32-NEXT:    [[S:%.*]] = alloca [[STRUCT_SPSEMPTY:%.*]], align 4
+// CHECK-A64_32-NEXT:    store i64 [[S_COERCE]], ptr [[S]], align 4
+// CHECK-A64_32-NEXT:    [[X:%.*]] = getelementptr inbounds nuw [[STRUCT_SPSEMPTY]], ptr [[S]], i32 0, i32 1
+// CHECK-A64_32-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[X]], align 4
+// CHECK-A64_32-NEXT:    store i32 1, ptr [[TMP0]], align 4
+// CHECK-A64_32-NEXT:    ret void
+//
+void TpSempty(SpSempty s) { *s.x = 1; }