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| 1 | +; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py |
| 2 | +; RUN: llc -mtriple powerpc-ibm-aix-xcoff -verify-machineinstrs < %s | FileCheck %s -DINSTR=lwz --check-prefix=CHECK |
| 3 | +; RUN: llc -mtriple powerpc64-ibm-aix-xcoff -verify-machineinstrs < %s | FileCheck %s -DINSTR=ld --check-prefix=CHECK |
| 4 | + |
| 5 | +; RUN: llc -filetype=obj -mtriple powerpc-ibm-aix-xcoff -verify-machineinstrs < %s -o %t32.o |
| 6 | +; RUN: llvm-objdump -t --symbol-description %t32.o | FileCheck %s --check-prefix=OBJ32 |
| 7 | + |
| 8 | +; RUN: llc -filetype=obj -mtriple powerpc64-ibm-aix-xcoff -verify-machineinstrs < %s -o %t64.o |
| 9 | +; RUN: llvm-objdump -t --symbol-description %t64.o | FileCheck %s --check-prefix=OBJ64 |
| 10 | + |
| 11 | +@a1 = common global i32 0, align 4 #0 |
| 12 | +@a2 = global i32 0, align 4 #0 |
| 13 | +@a3 = common global i32 0, align 4 |
| 14 | +@a4 = global i32 0, align 4 |
| 15 | + |
| 16 | +define void @set(i32 noundef %_a) { |
| 17 | +; CHECK-LABEL: set: |
| 18 | +; CHECK: # %bb.0: # %entry |
| 19 | +; CHECK-NEXT: la 4, a2[TD](2) |
| 20 | +; CHECK-NEXT: la 5, a1[TD](2) |
| 21 | +; CHECK-NEXT: stw 3, 0(4) |
| 22 | +; CHECK-NEXT: [[INSTR]] 4, L..C0(2) # @a4 |
| 23 | +; CHECK-NEXT: stw 3, 0(5) |
| 24 | +; CHECK-NEXT: [[INSTR]] 5, L..C1(2) # @a3 |
| 25 | +; CHECK-NEXT: stw 3, 0(4) |
| 26 | +; CHECK-NEXT: stw 3, 0(5) |
| 27 | +; CHECK-NEXT: blr |
| 28 | +entry: |
| 29 | +store i32 %_a, ptr @a2, align 4 |
| 30 | +store i32 %_a, ptr @a1, align 4 |
| 31 | +store i32 %_a, ptr @a4, align 4 |
| 32 | +store i32 %_a, ptr @a3, align 4 |
| 33 | +ret void |
| 34 | +} |
| 35 | + |
| 36 | +define i32 @get1() { |
| 37 | +; CHECK-LABEL: get1: |
| 38 | +; CHECK: # %bb.0: # %entry |
| 39 | +; CHECK-NEXT: la 3, a2[TD](2) |
| 40 | +; CHECK-NEXT: lwz 3, 0(3) |
| 41 | +; CHECK-NEXT: blr |
| 42 | +entry: |
| 43 | +%0 = load i32, ptr @a2, align 4 |
| 44 | +ret i32 %0 |
| 45 | +} |
| 46 | + |
| 47 | +define i32 @get2() { |
| 48 | +; CHECK-LABEL: get2: |
| 49 | +; CHECK: # %bb.0: # %entry |
| 50 | +; CHECK-NEXT: la 3, a1[TD](2) |
| 51 | +; CHECK-NEXT: lwz 3, 0(3) |
| 52 | +; CHECK-NEXT: blr |
| 53 | +entry: |
| 54 | +%0 = load i32, ptr @a1, align 4 |
| 55 | +ret i32 %0 |
| 56 | +} |
| 57 | + |
| 58 | +define i32 @get3() { |
| 59 | +; CHECK-LABEL: get3: |
| 60 | +; CHECK: # %bb.0: # %entry |
| 61 | +; CHECK-NEXT: [[INSTR]] 3, L..C0(2) # @a4 |
| 62 | +; CHECK-NEXT: lwz 3, 0(3) |
| 63 | +; CHECK-NEXT: blr |
| 64 | +entry: |
| 65 | +%0 = load i32, ptr @a4, align 4 |
| 66 | +ret i32 %0 |
| 67 | +} |
| 68 | + |
| 69 | +define i32 @get4() { |
| 70 | +; CHECK-LABEL: get4: |
| 71 | +; CHECK: # %bb.0: # %entry |
| 72 | +; CHECK-NEXT: [[INSTR]] 3, L..C1(2) # @a3 |
| 73 | +; CHECK-NEXT: lwz 3, 0(3) |
| 74 | +; CHECK-NEXT: blr |
| 75 | +entry: |
| 76 | +%0 = load i32, ptr @a3, align 4 |
| 77 | +ret i32 %0 |
| 78 | +} |
| 79 | + |
| 80 | +define nonnull ptr @escape1() { |
| 81 | +; CHECK-LABEL: escape1: |
| 82 | +; CHECK: # %bb.0: # %entry |
| 83 | +; CHECK-NEXT: la 3, a2[TD](2) |
| 84 | +; CHECK-NEXT: blr |
| 85 | +entry: |
| 86 | +ret ptr @a2 |
| 87 | +} |
| 88 | + |
| 89 | +define nonnull ptr @escape2() { |
| 90 | +; CHECK-LABEL: escape2: |
| 91 | +; CHECK: # %bb.0: # %entry |
| 92 | +; CHECK-NEXT: la 3, a1[TD](2) |
| 93 | +; CHECK-NEXT: blr |
| 94 | +entry: |
| 95 | +ret ptr @a1 |
| 96 | +} |
| 97 | + |
| 98 | +define nonnull ptr @escape3() { |
| 99 | +; CHECK-LABEL: escape3: |
| 100 | +; CHECK: # %bb.0: # %entry |
| 101 | +; CHECK-NEXT: [[INSTR]] 3, L..C0(2) # @a4 |
| 102 | +; CHECK-NEXT: blr |
| 103 | +entry: |
| 104 | +ret ptr @a4 |
| 105 | +} |
| 106 | + |
| 107 | +define nonnull ptr @escape4() { |
| 108 | +; CHECK-LABEL: escape4: |
| 109 | +; CHECK: # %bb.0: # %entry |
| 110 | +; CHECK-NEXT: [[INSTR]] 3, L..C1(2) # @a3 |
| 111 | +; CHECK-NEXT: blr |
| 112 | +entry: |
| 113 | +ret ptr @a3 |
| 114 | +} |
| 115 | + |
| 116 | +attributes #0 = { "toc-data" } |
| 117 | + |
| 118 | +; CHECK: .comm a3[RW],4,2 # @a3 |
| 119 | +; CHECK-NEXT: .csect a4[RW],2 |
| 120 | +; CHECK-NEXT: .globl a4[RW] # @a4 |
| 121 | +; CHECK-NEXT: .align 2 |
| 122 | +; CHECK-NEXT: .vbyte 4, 0 # 0x0 |
| 123 | +; CHECK-NEXT: .toc |
| 124 | +; CHECK-LABEL: L..C0: |
| 125 | +; CHECK-NEXT: .tc a4[TC],a4[RW] |
| 126 | +; CHECK-LABEL: L..C1: |
| 127 | +; CHECK-NEXT: .tc a3[TC],a3[RW] |
| 128 | +; CHECK-NEXT: .csect a2[TD],2 |
| 129 | +; CHECK-NEXT: .globl a2[TD] # @a2 |
| 130 | +; CHECK-NEXT: .align 2 |
| 131 | +; CHECK-NEXT: .vbyte 4, 0 # 0x0 |
| 132 | +; CHECK-NEXT: .comm a1[TD],4,2 # @a1 |
| 133 | + |
| 134 | +; OBJ32: {{([[:xdigit:]]{8})}} g O .data 00000004 (idx: {{[0-9]+}}) a4[RW] |
| 135 | +; OBJ32-LABEL: {{([[:xdigit:]]{8})}} l .data 00000000 (idx: {{[0-9]+}}) TOC[TC0] |
| 136 | +; OBJ32-NEXT: {{([[:xdigit:]]{8})}} l O .data 00000004 (idx: {{[0-9]+}}) a4[TC] |
| 137 | +; OBJ32-NEXT: {{([[:xdigit:]]{8})}} l O .data 00000004 (idx: {{[0-9]+}}) a3[TC] |
| 138 | +; OBJ32-NEXT: {{([[:xdigit:]]{8})}} g O .data 00000004 (idx: {{[0-9]+}}) a2[TD] |
| 139 | +; OBJ32-NEXT: {{([[:xdigit:]]{8})}} g O *COM* 00000004 (idx: {{[0-9]+}}) a1[TD] |
| 140 | +; OBJ32-NEXT: {{([[:xdigit:]]{8})}} g O *COM* 00000004 (idx: {{[0-9]+}}) a3[RW] |
| 141 | + |
| 142 | +; OBJ64: {{([[:xdigit:]]{16})}} g O .data 0000000000000004 (idx: {{[0-9]+}}) a4[RW] |
| 143 | +; OBJ64-LABEL: {{([[:xdigit:]]{16})}} l .data 0000000000000000 (idx: {{[0-9]+}}) TOC[TC0] |
| 144 | +; OBJ64-NEXT: {{([[:xdigit:]]{16})}} l O .data 0000000000000008 (idx: {{[0-9]+}}) a4[TC] |
| 145 | +; OBJ64-NEXT: {{([[:xdigit:]]{16})}} l O .data 0000000000000008 (idx: {{[0-9]+}}) a3[TC] |
| 146 | +; OBJ64-NEXT: {{([[:xdigit:]]{16})}} g O .data 0000000000000004 (idx: {{[0-9]+}}) a2[TD] |
| 147 | +; OBJ64-NEXT: {{([[:xdigit:]]{16})}} g O *COM* 0000000000000004 (idx: {{[0-9]+}}) a1[TD] |
| 148 | +; OBJ64-NEXT: {{([[:xdigit:]]{16})}} g O *COM* 0000000000000004 (idx: {{[0-9]+}}) a3[RW] |
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