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1 parent 61526f5 commit a0c472dCopy full SHA for a0c472d
llvm/lib/Target/AMDGPU/SIFoldOperands.cpp
@@ -1260,14 +1260,6 @@ void SIFoldOperandsImpl::foldOperand(
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return;
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const TargetRegisterClass *DestRC = TRI->getRegClassForReg(*MRI, DestReg);
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- // Allow immediates COPYd into sgpr_lo16 to be further folded while
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- // still being legal if not further folded
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- if (DestRC == &AMDGPU::SGPR_LO16RegClass) {
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- assert(ST->useRealTrue16Insts());
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- MRI->setRegClass(DestReg, &AMDGPU::SGPR_32RegClass);
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- DestRC = &AMDGPU::SGPR_32RegClass;
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- }
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-
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// In order to fold immediates into copies, we need to change the copy to a
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// MOV. Find a compatible mov instruction with the value.
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for (unsigned MovOp :
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