Update llvm/lib/Target/RISCV/MCTargetDesc/RISCVBaseInfo.h

topperc · lenary · web-flow · commit a11e68314529 · 2025-03-03T10:48:31.000-08:00
Co-authored-by: Sam Elliott &lt;sam@lenary.co.uk&gt;
diff --git a/llvm/lib/Target/RISCV/MCTargetDesc/RISCVBaseInfo.h b/llvm/lib/Target/RISCV/MCTargetDesc/RISCVBaseInfo.h
@@ -628,7 +628,7 @@ inline static unsigned encodeRlistNumRegs(unsigned NumRegs) {
   assert(NumRegs > 0 && NumRegs < 14 && NumRegs != 12 &&
          "Unexpected number of registers");
   if (NumRegs == 13)
-    --NumRegs;
+    return RLISTENCODE::RA_S0_S11;
 
   return RLISTENCODE::RA + (NumRegs - 1);
 }

Original file line number	Diff line number	Diff line change
`@@ -628,7 +628,7 @@ inline static unsigned encodeRlistNumRegs(unsigned NumRegs) {`
`628`	`628`	`assert(NumRegs > 0 && NumRegs < 14 && NumRegs != 12 &&`
`629`	`629`	`"Unexpected number of registers");`
`630`	`630`	`if (NumRegs == 13)`
`631`		`- --NumRegs;`
	`631`	`+ return RLISTENCODE::RA_S0_S11;`
`632`	`632`
`633`	`633`	`return RLISTENCODE::RA + (NumRegs - 1);`
`634`	`634`	`}`