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michaelmaitlandmichaelmaitland
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[RISCV][VLOPT] Add support for 11.11 integer widening multiply instructions
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2 files changed

+132
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‎llvm/lib/Target/RISCV/RISCVVLOptimizer.cpp‎

Lines changed: 6 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -548,7 +548,12 @@ static bool isSupportedInstr(const MachineInstr &MI) {
548548
// 11.11. Vector Integer Divide Instructions
549549
// FIXME: Add support for 11.11 instructions
550550
// 11.12. Vector Widening Integer Multiply Instructions
551-
// FIXME: Add support for 11.12 instructions
551+
case RISCV::VWMUL_VV:
552+
case RISCV::VWMUL_VX:
553+
case RISCV::VWMULSU_VV:
554+
case RISCV::VWMULSU_VX:
555+
case RISCV::VWMULU_VV:
556+
case RISCV::VWMULU_VX:
552557
// 11.13. Vector Single-Width Integer Multiply-Add Instructions
553558
// FIXME: Add support for 11.13 instructions
554559
// 11.14. Vector Widening Integer Multiply-Add Instructions

‎llvm/test/CodeGen/RISCV/rvv/vl-opt-instrs.ll‎

Lines changed: 126 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -804,6 +804,132 @@ define <vscale x 4 x i32> @vmulhsu_vx(<vscale x 4 x i32> %a, i32 %b, iXLen %vl)
804804
ret <vscale x 4 x i32> %2
805805
}
806806

807+
define <vscale x 4 x i64> @vwmul_vv(<vscale x 4 x i32> %a, <vscale x 4 x i32> %b, iXLen %vl) {
808+
; NOVLOPT-LABEL: vwmul_vv:
809+
; NOVLOPT: # %bb.0:
810+
; NOVLOPT-NEXT: vsetvli a1, zero, e32, m2, ta, ma
811+
; NOVLOPT-NEXT: vwmul.vv v12, v8, v10
812+
; NOVLOPT-NEXT: vsetvli zero, a0, e64, m4, ta, ma
813+
; NOVLOPT-NEXT: vadd.vv v8, v12, v12
814+
; NOVLOPT-NEXT: ret
815+
;
816+
; VLOPT-LABEL: vwmul_vv:
817+
; VLOPT: # %bb.0:
818+
; VLOPT-NEXT: vsetvli zero, a0, e32, m2, ta, ma
819+
; VLOPT-NEXT: vwmul.vv v12, v8, v10
820+
; VLOPT-NEXT: vsetvli zero, zero, e64, m4, ta, ma
821+
; VLOPT-NEXT: vadd.vv v8, v12, v12
822+
; VLOPT-NEXT: ret
823+
%1 = call <vscale x 4 x i64> @llvm.riscv.vwmul.nxv4i64.nxv4i32.nxv4i32(<vscale x 4 x i64> poison, <vscale x 4 x i32> %a, <vscale x 4 x i32> %b, iXLen -1)
824+
%2 = call <vscale x 4 x i64> @llvm.riscv.vadd.nxv4i64.nxv4i64(<vscale x 4 x i64> poison, <vscale x 4 x i64> %1, <vscale x 4 x i64> %1, iXLen %vl)
825+
ret <vscale x 4 x i64> %2
826+
}
827+
828+
define <vscale x 4 x i64> @vwmul_vx(<vscale x 4 x i32> %a, i32 %b, iXLen %vl) {
829+
; NOVLOPT-LABEL: vwmul_vx:
830+
; NOVLOPT: # %bb.0:
831+
; NOVLOPT-NEXT: vsetvli a2, zero, e32, m2, ta, ma
832+
; NOVLOPT-NEXT: vwmul.vx v12, v8, a0
833+
; NOVLOPT-NEXT: vsetvli zero, a1, e64, m4, ta, ma
834+
; NOVLOPT-NEXT: vadd.vv v8, v12, v12
835+
; NOVLOPT-NEXT: ret
836+
;
837+
; VLOPT-LABEL: vwmul_vx:
838+
; VLOPT: # %bb.0:
839+
; VLOPT-NEXT: vsetvli zero, a1, e32, m2, ta, ma
840+
; VLOPT-NEXT: vwmul.vx v12, v8, a0
841+
; VLOPT-NEXT: vsetvli zero, zero, e64, m4, ta, ma
842+
; VLOPT-NEXT: vadd.vv v8, v12, v12
843+
; VLOPT-NEXT: ret
844+
%1 = call <vscale x 4 x i64> @llvm.riscv.vwmul.nxv4i64.nxv4i32.i32(<vscale x 4 x i64> poison, <vscale x 4 x i32> %a, i32 %b, iXLen -1)
845+
%2 = call <vscale x 4 x i64> @llvm.riscv.vadd.nxv4i64.nxv4i64(<vscale x 4 x i64> poison, <vscale x 4 x i64> %1, <vscale x 4 x i64> %1, iXLen %vl)
846+
ret <vscale x 4 x i64> %2
847+
}
848+
849+
define <vscale x 4 x i64> @vwmulsu_vv(<vscale x 4 x i32> %a, <vscale x 4 x i32> %b, iXLen %vl) {
850+
; NOVLOPT-LABEL: vwmulsu_vv:
851+
; NOVLOPT: # %bb.0:
852+
; NOVLOPT-NEXT: vsetvli a1, zero, e32, m2, ta, ma
853+
; NOVLOPT-NEXT: vwmulsu.vv v12, v8, v10
854+
; NOVLOPT-NEXT: vsetvli zero, a0, e64, m4, ta, ma
855+
; NOVLOPT-NEXT: vadd.vv v8, v12, v12
856+
; NOVLOPT-NEXT: ret
857+
;
858+
; VLOPT-LABEL: vwmulsu_vv:
859+
; VLOPT: # %bb.0:
860+
; VLOPT-NEXT: vsetvli zero, a0, e32, m2, ta, ma
861+
; VLOPT-NEXT: vwmulsu.vv v12, v8, v10
862+
; VLOPT-NEXT: vsetvli zero, zero, e64, m4, ta, ma
863+
; VLOPT-NEXT: vadd.vv v8, v12, v12
864+
; VLOPT-NEXT: ret
865+
%1 = call <vscale x 4 x i64> @llvm.riscv.vwmulsu.nxv4i64.nxv4i32.nxv4i32(<vscale x 4 x i64> poison, <vscale x 4 x i32> %a, <vscale x 4 x i32> %b, iXLen -1)
866+
%2 = call <vscale x 4 x i64> @llvm.riscv.vadd.nxv4i64.nxv4i64(<vscale x 4 x i64> poison, <vscale x 4 x i64> %1, <vscale x 4 x i64> %1, iXLen %vl)
867+
ret <vscale x 4 x i64> %2
868+
}
869+
870+
define <vscale x 4 x i64> @vwmulsu_vx(<vscale x 4 x i32> %a, i32 %b, iXLen %vl) {
871+
; NOVLOPT-LABEL: vwmulsu_vx:
872+
; NOVLOPT: # %bb.0:
873+
; NOVLOPT-NEXT: vsetvli a2, zero, e32, m2, ta, ma
874+
; NOVLOPT-NEXT: vwmulsu.vx v12, v8, a0
875+
; NOVLOPT-NEXT: vsetvli zero, a1, e64, m4, ta, ma
876+
; NOVLOPT-NEXT: vadd.vv v8, v12, v12
877+
; NOVLOPT-NEXT: ret
878+
;
879+
; VLOPT-LABEL: vwmulsu_vx:
880+
; VLOPT: # %bb.0:
881+
; VLOPT-NEXT: vsetvli zero, a1, e32, m2, ta, ma
882+
; VLOPT-NEXT: vwmulsu.vx v12, v8, a0
883+
; VLOPT-NEXT: vsetvli zero, zero, e64, m4, ta, ma
884+
; VLOPT-NEXT: vadd.vv v8, v12, v12
885+
; VLOPT-NEXT: ret
886+
%1 = call <vscale x 4 x i64> @llvm.riscv.vwmulsu.nxv4i64.nxv4i32.i32(<vscale x 4 x i64> poison, <vscale x 4 x i32> %a, i32 %b, iXLen -1)
887+
%2 = call <vscale x 4 x i64> @llvm.riscv.vadd.nxv4i64.nxv4i64(<vscale x 4 x i64> poison, <vscale x 4 x i64> %1, <vscale x 4 x i64> %1, iXLen %vl)
888+
ret <vscale x 4 x i64> %2
889+
}
890+
891+
define <vscale x 4 x i64> @vwmulu_vv(<vscale x 4 x i32> %a, <vscale x 4 x i32> %b, iXLen %vl) {
892+
; NOVLOPT-LABEL: vwmulu_vv:
893+
; NOVLOPT: # %bb.0:
894+
; NOVLOPT-NEXT: vsetvli a1, zero, e32, m2, ta, ma
895+
; NOVLOPT-NEXT: vwmulu.vv v12, v8, v10
896+
; NOVLOPT-NEXT: vsetvli zero, a0, e64, m4, ta, ma
897+
; NOVLOPT-NEXT: vadd.vv v8, v12, v12
898+
; NOVLOPT-NEXT: ret
899+
;
900+
; VLOPT-LABEL: vwmulu_vv:
901+
; VLOPT: # %bb.0:
902+
; VLOPT-NEXT: vsetvli zero, a0, e32, m2, ta, ma
903+
; VLOPT-NEXT: vwmulu.vv v12, v8, v10
904+
; VLOPT-NEXT: vsetvli zero, zero, e64, m4, ta, ma
905+
; VLOPT-NEXT: vadd.vv v8, v12, v12
906+
; VLOPT-NEXT: ret
907+
%1 = call <vscale x 4 x i64> @llvm.riscv.vwmulu.nxv4i64.nxv4i32.nxv4i32(<vscale x 4 x i64> poison, <vscale x 4 x i32> %a, <vscale x 4 x i32> %b, iXLen -1)
908+
%2 = call <vscale x 4 x i64> @llvm.riscv.vadd.nxv4i64.nxv4i64(<vscale x 4 x i64> poison, <vscale x 4 x i64> %1, <vscale x 4 x i64> %1, iXLen %vl)
909+
ret <vscale x 4 x i64> %2
910+
}
911+
912+
define <vscale x 4 x i64> @vwmulu_vx(<vscale x 4 x i32> %a, i32 %b, iXLen %vl) {
913+
; NOVLOPT-LABEL: vwmulu_vx:
914+
; NOVLOPT: # %bb.0:
915+
; NOVLOPT-NEXT: vsetvli a2, zero, e32, m2, ta, ma
916+
; NOVLOPT-NEXT: vwmulu.vx v12, v8, a0
917+
; NOVLOPT-NEXT: vsetvli zero, a1, e64, m4, ta, ma
918+
; NOVLOPT-NEXT: vadd.vv v8, v12, v12
919+
; NOVLOPT-NEXT: ret
920+
;
921+
; VLOPT-LABEL: vwmulu_vx:
922+
; VLOPT: # %bb.0:
923+
; VLOPT-NEXT: vsetvli zero, a1, e32, m2, ta, ma
924+
; VLOPT-NEXT: vwmulu.vx v12, v8, a0
925+
; VLOPT-NEXT: vsetvli zero, zero, e64, m4, ta, ma
926+
; VLOPT-NEXT: vadd.vv v8, v12, v12
927+
; VLOPT-NEXT: ret
928+
%1 = call <vscale x 4 x i64> @llvm.riscv.vwmulu.nxv4i64.nxv4i32.i32(<vscale x 4 x i64> poison, <vscale x 4 x i32> %a, i32 %b, iXLen -1)
929+
%2 = call <vscale x 4 x i64> @llvm.riscv.vadd.nxv4i64.nxv4i64(<vscale x 4 x i64> poison, <vscale x 4 x i64> %1, <vscale x 4 x i64> %1, iXLen %vl)
930+
ret <vscale x 4 x i64> %2
931+
}
932+
807933
define <vscale x 4 x i32> @vwmacc_vx(<vscale x 4 x i16> %a, i16 %b, iXLen %vl) {
808934
; NOVLOPT-LABEL: vwmacc_vx:
809935
; NOVLOPT: # %bb.0:

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