addressed review comments and updated tests.

Author: Mikhail Gudim

llvm/include/llvm/CodeGen/ReachingDefAnalysis.h

@@ -344,13 +344,11 @@ class ReachingDefInfoWrapperPass : public MachineFunctionPass {
   ReachingDefInfoWrapperPass();
 
   void getAnalysisUsage(AnalysisUsage &AU) const override;
-
+  MachineFunctionProperties getRequiredProperties() const override;
   bool runOnMachineFunction(MachineFunction &F) override;
-
   void releaseMemory() override { RDI.releaseMemory(); }
 
   ReachingDefInfo &getRDI() { return RDI; }
-
   const ReachingDefInfo &getRDI() const { return RDI; }
 };
 

llvm/include/llvm/Passes/MachinePassRegistry.def

@@ -82,10 +82,9 @@ MACHINE_FUNCTION_ANALYSIS("machine-post-dom-tree",
 MACHINE_FUNCTION_ANALYSIS("machine-trace-metrics", MachineTraceMetricsAnalysis())
 MACHINE_FUNCTION_ANALYSIS("machine-uniformity", MachineUniformityAnalysis())
 MACHINE_FUNCTION_ANALYSIS("pass-instrumentation", PassInstrumentationAnalysis(PIC))
+MACHINE_FUNCTION_ANALYSIS("reaching-def", ReachingDefAnalysis())
 MACHINE_FUNCTION_ANALYSIS("regalloc-evict", RegAllocEvictionAdvisorAnalysis())
 MACHINE_FUNCTION_ANALYSIS("regalloc-priority", RegAllocPriorityAdvisorAnalysis())
-MACHINE_FUNCTION_ANALYSIS("reaching-def",
-ReachingDefAnalysis())
 MACHINE_FUNCTION_ANALYSIS("slot-indexes", SlotIndexesAnalysis())
 MACHINE_FUNCTION_ANALYSIS("spill-code-placement", SpillPlacementAnalysis())
 MACHINE_FUNCTION_ANALYSIS("virtregmap", VirtRegMapAnalysis())
@@ -152,9 +151,9 @@ MACHINE_FUNCTION_PASS("print<machine-post-dom-tree>",
                       MachinePostDominatorTreePrinterPass(errs()))
 MACHINE_FUNCTION_PASS("print<machine-uniformity>",
                       MachineUniformityPrinterPass(errs()))
+MACHINE_FUNCTION_PASS("print<reaching-def>", ReachingDefPrinterPass(errs()))
 MACHINE_FUNCTION_PASS("print<slot-indexes>", SlotIndexesPrinterPass(errs()))
 MACHINE_FUNCTION_PASS("print<virtregmap>", VirtRegMapPrinterPass(errs()))
-MACHINE_FUNCTION_PASS("print<reaching-def>", ReachingDefPrinterPass(errs()))
 MACHINE_FUNCTION_PASS("process-imp-defs", ProcessImplicitDefsPass())
 MACHINE_FUNCTION_PASS("prolog-epilog", PrologEpilogInserterPass())
 MACHINE_FUNCTION_PASS("reg-usage-collector", RegUsageInfoCollectorPass())

llvm/lib/CodeGen/ReachingDefAnalysis.cpp

@@ -33,6 +33,8 @@ ReachingDefAnalysis::run(MachineFunction &MF,
 PreservedAnalyses
 ReachingDefPrinterPass::run(MachineFunction &MF,
                             MachineFunctionAnalysisManager &MFAM) {
+  MFPropsModifier _(*this, MF);
+
   auto &RDI = MFAM.getResult<ReachingDefAnalysis>(MF);
   OS << "Reaching definitions for for machine function: " << MF.getName()
      << '\n';
@@ -70,6 +72,11 @@ void ReachingDefInfoWrapperPass::getAnalysisUsage(AnalysisUsage &AU) const {
   MachineFunctionPass::getAnalysisUsage(AU);
 }
 
+MachineFunctionProperties
+ReachingDefInfoWrapperPass::getRequiredProperties() const {
+  return MachineFunctionProperties().setNoVRegs();
+}
+
 static bool isValidReg(const MachineOperand &MO) {
   return MO.isReg() && MO.getReg();
 }

llvm/test/CodeGen/ARM/O3-pipeline.ll

@@ -162,7 +162,7 @@
 ; CHECK-NEXT:      Machine Copy Propagation Pass
 ; CHECK-NEXT:      Post-RA pseudo instruction expansion pass
 ; CHECK-NEXT:      ARM load / store optimization pass
-; CHECK-NEXT:      ReachingDefAnalysis
+; CHECK-NEXT:      Reaching Definitions Analysis
 ; CHECK-NEXT:      ARM Execution Domain Fix
 ; CHECK-NEXT:      BreakFalseDeps
 ; CHECK-NEXT:      ARM pseudo instruction expansion pass
@@ -204,14 +204,14 @@
 ; CHECK-NEXT:      Lazy Machine Block Frequency Analysis
 ; CHECK-NEXT:      Machine Optimization Remark Emitter
 ; CHECK-NEXT:      Stack Frame Layout Analysis
-; CHECK-NEXT:      ReachingDefAnalysis
+; CHECK-NEXT:      Reaching Definitions Analysis
 ; CHECK-NEXT:      ARM fix for Cortex-A57 AES Erratum 1742098
 ; CHECK-NEXT:      ARM Branch Targets
 ; CHECK-NEXT:      MachineDominator Tree Construction
 ; CHECK-NEXT:      ARM constant island placement and branch shortening pass
 ; CHECK-NEXT:      MachineDominator Tree Construction
 ; CHECK-NEXT:      Machine Natural Loop Construction
-; CHECK-NEXT:      ReachingDefAnalysis
+; CHECK-NEXT:      Reaching Definitions Analysis
 ; CHECK-NEXT:      ARM Low Overhead Loops pass
 ; CHECK-NEXT:      Lazy Machine Block Frequency Analysis
 ; CHECK-NEXT:      Machine Optimization Remark Emitter

llvm/test/CodeGen/RISCV/rda-stack.mir

@@ -1,4 +1,4 @@
-# RUN: llc %s -mtriple=riscv64 -run-pass=reaching-defs-analysis -print-all-reaching-defs -o - 2>&1 | FileCheck %s
+# RUN: llc %s -mtriple=riscv64 --passes='print<reaching-def>'  -o - 2>&1 | FileCheck %s
 
 ---
 name:            test0

llvm/test/CodeGen/SystemZ/rda-stack-copy.mir

@@ -1,4 +1,4 @@
-# RUN: llc %s -mtriple=s390x-linux-gnu -run-pass=reaching-defs-analysis -print-all-reaching-defs -o - 2>&1 | FileCheck %s
+# RUN: llc %s -mtriple=s390x-linux-gnu --passes='print<reaching-def>'  -o - 2>&1 | FileCheck %s
 
 ---
 name:            test0

llvm/test/CodeGen/X86/opt-pipeline.ll

@@ -195,7 +195,7 @@
 ; CHECK-NEXT:       Insert fentry calls
 ; CHECK-NEXT:       Insert XRay ops
 ; CHECK-NEXT:       Implement the 'patchable-function' attribute
-; CHECK-NEXT:       ReachingDefAnalysis
+; CHECK-NEXT:       Reaching Definitions Analysis
 ; CHECK-NEXT:       X86 Execution Dependency Fix
 ; CHECK-NEXT:       BreakFalseDeps
 ; CHECK-NEXT:       X86 Indirect Branch Tracking

llvm/test/CodeGen/X86/print-reaching-defs.mir

@@ -1,4 +1,6 @@
- # RUN: llc --passes='print<reaching-def>' -filetype=null 2>&1 %s | FileCheck %s
+# RUN: llc -mtriple=x86_64-unknown-unknown \
+# RUN: --passes='print<reaching-def>' \
+# RUN: -filetype=null 2>&1 %s | FileCheck %s
 
 ---
 name:            is_odd