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[MachineSink] Remove subrange of live-ins from super register as well. (#159145)
Post-RA machine sinking could sink a copy of sub-register into a successor. However, the sub-register might not be removed from the live-in bitmask of its super register in successor and then a later pass, e.g, if-converter, may add an implicit use of the register from live-in resulting in an use of an undefined register. This change makes sure subrange of live-ins from super register could be removed as well.
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5 files changed

+141
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‎llvm/include/llvm/CodeGen/MachineBasicBlock.h‎

Lines changed: 5 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -505,6 +505,11 @@ class MachineBasicBlock
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LLVM_ABI void removeLiveIn(MCRegister Reg,
506506
LaneBitmask LaneMask = LaneBitmask::getAll());
507507

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/// Remove the specified register from any overlapped live in. The method is
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/// subreg-aware and removes Reg and its subregs from the live in set. It also
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/// clears the corresponding bitmask from its live-in super registers.
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LLVM_ABI void removeLiveInOverlappedWith(MCRegister Reg);
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508513
/// Return true if the specified register is in the live in set.
509514
LLVM_ABI bool isLiveIn(MCRegister Reg,
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LaneBitmask LaneMask = LaneBitmask::getAll()) const;

‎llvm/lib/CodeGen/MachineBasicBlock.cpp‎

Lines changed: 20 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -606,6 +606,26 @@ void MachineBasicBlock::removeLiveIn(MCRegister Reg, LaneBitmask LaneMask) {
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LiveIns.erase(I);
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}
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void MachineBasicBlock::removeLiveInOverlappedWith(MCRegister Reg) {
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const MachineFunction *MF = getParent();
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const TargetRegisterInfo *TRI = MF->getSubtarget().getRegisterInfo();
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// Remove Reg and its subregs from live in set.
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for (MCPhysReg S : TRI->subregs_inclusive(Reg))
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removeLiveIn(S);
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// Remove live-in bitmask in super registers as well.
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for (MCPhysReg Super : TRI->superregs(Reg)) {
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for (MCSubRegIndexIterator SRI(Super, TRI); SRI.isValid(); ++SRI) {
619+
if (Reg == SRI.getSubReg()) {
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unsigned SubRegIndex = SRI.getSubRegIndex();
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LaneBitmask SubRegLaneMask = TRI->getSubRegIndexLaneMask(SubRegIndex);
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removeLiveIn(Super, SubRegLaneMask);
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break;
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}
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}
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}
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}
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MachineBasicBlock::livein_iterator
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MachineBasicBlock::removeLiveIn(MachineBasicBlock::livein_iterator I) {
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// Get non-const version of iterator.

‎llvm/lib/CodeGen/MachineSink.cpp‎

Lines changed: 2 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -2187,11 +2187,9 @@ static void clearKillFlags(MachineInstr *MI, MachineBasicBlock &CurBB,
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static void updateLiveIn(MachineInstr *MI, MachineBasicBlock *SuccBB,
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const SmallVectorImpl<unsigned> &UsedOpsInCopy,
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const SmallVectorImpl<Register> &DefedRegsInCopy) {
2190-
MachineFunction &MF = *SuccBB->getParent();
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const TargetRegisterInfo *TRI = MF.getSubtarget().getRegisterInfo();
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for (Register DefReg : DefedRegsInCopy)
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for (MCPhysReg S : TRI->subregs_inclusive(DefReg))
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SuccBB->removeLiveIn(S);
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SuccBB->removeLiveInOverlappedWith(DefReg);
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for (auto U : UsedOpsInCopy)
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SuccBB->addLiveIn(MI->getOperand(U).getReg());
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SuccBB->sortUniqueLiveIns();

‎llvm/test/CodeGen/AMDGPU/av_spill_cross_bb_usage.mir‎

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -49,7 +49,7 @@ body: |
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; GCN-NEXT: {{ $}}
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; GCN-NEXT: bb.1:
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; GCN-NEXT: successors: %bb.2(0x80000000)
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; GCN-NEXT: liveins: $exec, $sgpr30, $sgpr31, $vgpr0, $vgpr1, $vgpr2, $vgpr3, $vgpr4, $vgpr5, $vgpr6, $vgpr7, $vgpr8, $vgpr9, $vgpr40, $sgpr30_sgpr31, $vgpr10_vgpr11:0x000000000000000F, $vgpr14_vgpr15:0x000000000000000F, $vgpr41_vgpr42:0x000000000000000F, $vgpr43_vgpr44:0x000000000000000F, $vgpr45_vgpr46:0x000000000000000F, $vgpr56_vgpr57:0x000000000000000F, $vgpr58_vgpr59:0x000000000000000F, $vgpr60_vgpr61:0x000000000000000F
52+
; GCN-NEXT: liveins: $exec, $sgpr30, $sgpr31, $vgpr0, $vgpr1, $vgpr2, $vgpr3, $vgpr4, $vgpr5, $vgpr6, $vgpr7, $vgpr8, $vgpr9, $vgpr40, $sgpr30_sgpr31, $vgpr10_vgpr11:0x000000000000000F, $vgpr14_vgpr15:0x000000000000000F, $vgpr43_vgpr44:0x000000000000000F
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; GCN-NEXT: {{ $}}
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; GCN-NEXT: renamable $vgpr57 = COPY $vgpr9, implicit $exec
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; GCN-NEXT: renamable $vgpr56 = COPY $vgpr8, implicit $exec

‎llvm/test/CodeGen/AMDGPU/postra-machine-sink-livein-subrange.mir‎

Lines changed: 113 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,113 @@
1+
# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py UTC_ARGS: --version 6
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# RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx908 -run-pass=postra-machine-sink -verify-machineinstrs -o - %s | FileCheck --check-prefixes=GCN %s
3+
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# Test live-in with subrange is updated accordingly in postra-machine-sink.
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---
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name: test_postra_machine_sink_livein_update
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tracksRegLiveness: true
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frameInfo:
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adjustsStack: true
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stack:
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- { id: 0, name: '', type: spill-slot, offset: 0, size: 4, alignment: 4,
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stack-id: default, callee-saved-register: '', callee-saved-restored: true,
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debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
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- { id: 1, name: '', type: spill-slot, offset: 0, size: 8, alignment: 4,
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stack-id: default, callee-saved-register: '', callee-saved-restored: true,
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debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
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- { id: 2, name: '', type: spill-slot, offset: 0, size: 8, alignment: 4,
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stack-id: default, callee-saved-register: '', callee-saved-restored: true,
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debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
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machineFunctionInfo:
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scratchRSrcReg: '$sgpr0_sgpr1_sgpr2_sgpr3'
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stackPtrOffsetReg: '$sgpr32'
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body: |
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; GCN-LABEL: name: test_postra_machine_sink_livein_update
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; GCN: bb.0:
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; GCN-NEXT: successors: %bb.2(0x40000000), %bb.1(0x40000000)
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; GCN-NEXT: liveins: $sgpr30, $sgpr31, $vgpr0, $vgpr1, $vgpr2, $vgpr3, $vgpr4, $vgpr5, $vgpr6, $vgpr7, $vgpr8, $vgpr9, $vgpr10, $vgpr11, $vgpr12, $vgpr13, $vgpr14, $vgpr15, $vgpr40, $sgpr30_sgpr31
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; GCN-NEXT: {{ $}}
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; GCN-NEXT: renamable $vgpr44 = COPY $vgpr13, implicit $exec
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; GCN-NEXT: renamable $vgpr43 = COPY $vgpr12, implicit $exec
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; GCN-NEXT: S_CBRANCH_SCC1 %bb.2, implicit undef $scc
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; GCN-NEXT: S_BRANCH %bb.1
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; GCN-NEXT: {{ $}}
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; GCN-NEXT: bb.1:
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; GCN-NEXT: successors: %bb.2(0x80000000)
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; GCN-NEXT: liveins: $exec, $sgpr30, $sgpr31, $vgpr0, $vgpr1, $vgpr2, $vgpr3, $vgpr4, $vgpr5, $vgpr6, $vgpr7, $vgpr8, $vgpr9, $vgpr40, $sgpr30_sgpr31, $vgpr10_vgpr11:0x000000000000000F, $vgpr14_vgpr15:0x000000000000000F, $vgpr43_vgpr44:0x000000000000000F
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; GCN-NEXT: {{ $}}
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; GCN-NEXT: renamable $vgpr57 = COPY $vgpr9, implicit $exec
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; GCN-NEXT: renamable $vgpr56 = COPY $vgpr8, implicit $exec
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; GCN-NEXT: renamable $vgpr59 = COPY $vgpr7, implicit $exec
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; GCN-NEXT: renamable $vgpr58 = COPY $vgpr6, implicit $exec
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; GCN-NEXT: renamable $vgpr61 = COPY $vgpr5, implicit $exec
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; GCN-NEXT: renamable $vgpr60 = COPY $vgpr4, implicit $exec
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; GCN-NEXT: renamable $vgpr42 = COPY $vgpr3, implicit $exec
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; GCN-NEXT: renamable $vgpr41 = COPY $vgpr2, implicit $exec
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; GCN-NEXT: renamable $vgpr46 = COPY $vgpr1, implicit $exec
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; GCN-NEXT: renamable $vgpr45 = COPY $vgpr0, implicit $exec
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; GCN-NEXT: ADJCALLSTACKUP 0, 0, implicit-def dead $scc, implicit-def $sgpr32, implicit $sgpr32
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; GCN-NEXT: renamable $sgpr16_sgpr17 = IMPLICIT_DEF
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; GCN-NEXT: $vgpr40 = SI_SPILL_S32_TO_VGPR $sgpr30, 0, $vgpr40, implicit-def $sgpr30_sgpr31, implicit $sgpr30_sgpr31
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; GCN-NEXT: $vgpr40 = SI_SPILL_S32_TO_VGPR $sgpr31, 1, $vgpr40, implicit $sgpr30_sgpr31
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; GCN-NEXT: SI_SPILL_AV64_SAVE killed $vgpr14_vgpr15, %stack.1, $sgpr32, 0, implicit $exec :: (store (s64) into %stack.1, align 4, addrspace 5)
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; GCN-NEXT: SI_SPILL_AV64_SAVE killed $vgpr10_vgpr11, %stack.2, $sgpr32, 0, implicit $exec :: (store (s64) into %stack.2, align 4, addrspace 5)
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; GCN-NEXT: dead $sgpr30_sgpr31 = SI_CALL killed renamable $sgpr16_sgpr17, 0, csr_amdgpu, implicit-def dead $vgpr0
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; GCN-NEXT: renamable $vgpr14_vgpr15 = SI_SPILL_AV64_RESTORE %stack.1, $sgpr32, 0, implicit $exec :: (load (s64) from %stack.1, align 4, addrspace 5)
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; GCN-NEXT: renamable $vgpr0_vgpr1 = nofpexcept V_FMA_F64_e64 0, killed $vgpr45_vgpr46, 0, killed $vgpr41_vgpr42, 0, killed $vgpr60_vgpr61, 0, 0, implicit $mode, implicit $exec
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; GCN-NEXT: ADJCALLSTACKDOWN 0, 0, implicit-def dead $scc, implicit-def $sgpr32, implicit $sgpr32
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; GCN-NEXT: FLAT_STORE_DWORDX2 killed renamable $vgpr58_vgpr59, killed renamable $vgpr0_vgpr1, 0, 0, implicit $exec, implicit $flat_scr :: (store (s64))
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; GCN-NEXT: renamable $vgpr0_vgpr1 = SI_SPILL_AV64_RESTORE %stack.2, $sgpr32, 0, implicit $exec :: (load (s64) from %stack.2, align 4, addrspace 5)
60+
; GCN-NEXT: FLAT_STORE_DWORDX2 killed renamable $vgpr0_vgpr1, killed renamable $vgpr56_vgpr57, 0, 0, implicit $exec, implicit $flat_scr :: (store (s64))
61+
; GCN-NEXT: {{ $}}
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; GCN-NEXT: bb.2:
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; GCN-NEXT: liveins: $vgpr40, $vgpr14_vgpr15:0x000000000000000F, $vgpr43_vgpr44:0x000000000000000F
64+
; GCN-NEXT: {{ $}}
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; GCN-NEXT: renamable $vgpr0_vgpr1 = V_MOV_B64_PSEUDO 0, implicit $exec
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; GCN-NEXT: FLAT_STORE_DWORDX2 undef renamable $vgpr0_vgpr1, killed renamable $vgpr43_vgpr44, 0, 0, implicit $exec, implicit $flat_scr :: (store (s64))
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; GCN-NEXT: FLAT_STORE_DWORDX2 killed renamable $vgpr0_vgpr1, killed renamable $vgpr14_vgpr15, 0, 0, implicit $exec, implicit $flat_scr :: (store (s64))
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; GCN-NEXT: S_SETPC_B64_return undef $sgpr30_sgpr31
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bb.0:
70+
successors: %bb.2(0x40000000), %bb.1(0x40000000)
71+
liveins: $sgpr30, $sgpr31, $vgpr0, $vgpr1, $vgpr2, $vgpr3, $vgpr4, $vgpr5, $vgpr6, $vgpr7, $vgpr8, $vgpr9, $vgpr10, $vgpr11, $vgpr12, $vgpr13, $vgpr14, $vgpr15, $vgpr40, $sgpr30_sgpr31
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renamable $vgpr44 = COPY $vgpr13, implicit $exec
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renamable $vgpr43 = COPY $vgpr12, implicit $exec
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renamable $vgpr57 = COPY $vgpr9, implicit $exec
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renamable $vgpr56 = COPY $vgpr8, implicit $exec
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renamable $vgpr59 = COPY $vgpr7, implicit $exec
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renamable $vgpr58 = COPY $vgpr6, implicit $exec
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renamable $vgpr61 = COPY $vgpr5, implicit $exec
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renamable $vgpr60 = COPY $vgpr4, implicit $exec
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renamable $vgpr42 = COPY $vgpr3, implicit $exec
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renamable $vgpr41 = COPY $vgpr2, implicit $exec
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renamable $vgpr46 = COPY $vgpr1, implicit $exec
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renamable $vgpr45 = COPY $vgpr0, implicit $exec
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S_CBRANCH_SCC1 %bb.2, implicit undef $scc
86+
S_BRANCH %bb.1
87+
88+
bb.1:
89+
successors: %bb.2(0x80000000)
90+
liveins: $sgpr30, $sgpr31, $vgpr40, $sgpr30_sgpr31, $vgpr10_vgpr11:0x000000000000000F, $vgpr14_vgpr15:0x000000000000000F, $vgpr41_vgpr42:0x000000000000000F, $vgpr43_vgpr44:0x000000000000000F, $vgpr45_vgpr46:0x000000000000000F, $vgpr56_vgpr57:0x000000000000000F, $vgpr58_vgpr59:0x000000000000000F, $vgpr60_vgpr61:0x000000000000000F
91+
92+
ADJCALLSTACKUP 0, 0, implicit-def dead $scc, implicit-def $sgpr32, implicit $sgpr32
93+
renamable $sgpr16_sgpr17 = IMPLICIT_DEF
94+
$vgpr40 = SI_SPILL_S32_TO_VGPR $sgpr30, 0, $vgpr40, implicit-def $sgpr30_sgpr31, implicit $sgpr30_sgpr31
95+
$vgpr40 = SI_SPILL_S32_TO_VGPR $sgpr31, 1, $vgpr40, implicit $sgpr30_sgpr31
96+
SI_SPILL_AV64_SAVE killed $vgpr14_vgpr15, %stack.1, $sgpr32, 0, implicit $exec :: (store (s64) into %stack.1, align 4, addrspace 5)
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SI_SPILL_AV64_SAVE killed $vgpr10_vgpr11, %stack.2, $sgpr32, 0, implicit $exec :: (store (s64) into %stack.2, align 4, addrspace 5)
98+
dead $sgpr30_sgpr31 = SI_CALL killed renamable $sgpr16_sgpr17, 0, csr_amdgpu, implicit-def dead $vgpr0
99+
renamable $vgpr14_vgpr15 = SI_SPILL_AV64_RESTORE %stack.1, $sgpr32, 0, implicit $exec :: (load (s64) from %stack.1, align 4, addrspace 5)
100+
renamable $vgpr0_vgpr1 = nofpexcept V_FMA_F64_e64 0, killed $vgpr45_vgpr46, 0, killed $vgpr41_vgpr42, 0, killed $vgpr60_vgpr61, 0, 0, implicit $mode, implicit $exec
101+
ADJCALLSTACKDOWN 0, 0, implicit-def dead $scc, implicit-def $sgpr32, implicit $sgpr32
102+
FLAT_STORE_DWORDX2 killed renamable $vgpr58_vgpr59, killed renamable $vgpr0_vgpr1, 0, 0, implicit $exec, implicit $flat_scr :: (store (s64))
103+
renamable $vgpr0_vgpr1 = SI_SPILL_AV64_RESTORE %stack.2, $sgpr32, 0, implicit $exec :: (load (s64) from %stack.2, align 4, addrspace 5)
104+
FLAT_STORE_DWORDX2 killed renamable $vgpr0_vgpr1, killed renamable $vgpr56_vgpr57, 0, 0, implicit $exec, implicit $flat_scr :: (store (s64))
105+
106+
bb.2:
107+
liveins: $vgpr40, $vgpr14_vgpr15:0x000000000000000F, $vgpr43_vgpr44:0x000000000000000F
108+
109+
renamable $vgpr0_vgpr1 = V_MOV_B64_PSEUDO 0, implicit $exec
110+
FLAT_STORE_DWORDX2 undef renamable $vgpr0_vgpr1, killed renamable $vgpr43_vgpr44, 0, 0, implicit $exec, implicit $flat_scr :: (store (s64))
111+
FLAT_STORE_DWORDX2 killed renamable $vgpr0_vgpr1, killed renamable $vgpr14_vgpr15, 0, 0, implicit $exec, implicit $flat_scr :: (store (s64))
112+
S_SETPC_B64_return undef $sgpr30_sgpr31
113+
...

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