@@ -348,7 +348,8 @@ NativeRegisterContextLinux_arm::SetHardwareBreakpoint(lldb::addr_t addr,
348348 m_hbr_regs[bp_index].control = control_value;
349349
350350 // PTRACE call to set corresponding hardware breakpoint register.
351- error = WriteHardwareDebugRegs (eDREGTypeBREAK, bp_index);
351+ error = WriteHardwareDebugRegs (NativeRegisterContextDBReg::eDREGTypeBREAK,
352+ bp_index);
352353
353354 if (error.Fail ()) {
354355 m_hbr_regs[bp_index].address = 0 ;
@@ -381,7 +382,8 @@ bool NativeRegisterContextLinux_arm::ClearHardwareBreakpoint(uint32_t hw_idx) {
381382 m_hbr_regs[hw_idx].address = 0 ;
382383
383384 // PTRACE call to clear corresponding hardware breakpoint register.
384- error = WriteHardwareDebugRegs (eDREGTypeBREAK, hw_idx);
385+ error = WriteHardwareDebugRegs (NativeRegisterContextDBReg::eDREGTypeBREAK,
386+ hw_idx);
385387
386388 if (error.Fail ()) {
387389 m_hbr_regs[hw_idx].control = tempControl;
@@ -441,7 +443,8 @@ Status NativeRegisterContextLinux_arm::ClearAllHardwareBreakpoints() {
441443 m_hbr_regs[i].address = 0 ;
442444
443445 // Ptrace call to update hardware debug registers
444- error = WriteHardwareDebugRegs (eDREGTypeBREAK, i);
446+ error =
447+ WriteHardwareDebugRegs (NativeRegisterContextDBReg::eDREGTypeBREAK, i);
445448
446449 if (error.Fail ()) {
447450 m_hbr_regs[i].control = tempControl;
@@ -561,7 +564,8 @@ uint32_t NativeRegisterContextLinux_arm::SetHardwareWatchpoint(
561564 m_hwp_regs[wp_index].control = control_value;
562565
563566 // PTRACE call to set corresponding watchpoint register.
564- error = WriteHardwareDebugRegs (eDREGTypeWATCH, wp_index);
567+ error = WriteHardwareDebugRegs (NativeRegisterContextDBReg::eDREGTypeWATCH,
568+ wp_index);
565569
566570 if (error.Fail ()) {
567571 m_hwp_regs[wp_index].address = 0 ;
@@ -596,7 +600,8 @@ bool NativeRegisterContextLinux_arm::ClearHardwareWatchpoint(
596600 m_hwp_regs[wp_index].address = 0 ;
597601
598602 // Ptrace call to update hardware debug registers
599- error = WriteHardwareDebugRegs (eDREGTypeWATCH, wp_index);
603+ error = WriteHardwareDebugRegs (NativeRegisterContextDBReg::eDREGTypeWATCH,
604+ wp_index);
600605
601606 if (error.Fail ()) {
602607 m_hwp_regs[wp_index].control = tempControl;
@@ -629,7 +634,8 @@ Status NativeRegisterContextLinux_arm::ClearAllHardwareWatchpoints() {
629634 m_hwp_regs[i].address = 0 ;
630635
631636 // Ptrace call to update hardware debug registers
632- error = WriteHardwareDebugRegs (eDREGTypeWATCH, i);
637+ error =
638+ WriteHardwareDebugRegs (NativeRegisterContextDBReg::eDREGTypeWATCH, i);
633639
634640 if (error.Fail ()) {
635641 m_hwp_regs[i].control = tempControl;
@@ -750,15 +756,15 @@ Status NativeRegisterContextLinux_arm::ReadHardwareDebugInfo() {
750756#endif // ifdef __arm__
751757}
752758
753- Status NativeRegisterContextLinux_arm::WriteHardwareDebugRegs (DREGType hwbType,
754- int hwb_index) {
759+ Status NativeRegisterContextLinux_arm::WriteHardwareDebugRegs (
760+ NativeRegisterContextDBReg::DREGType hwbType, int hwb_index) {
755761 Status error;
756762
757763#ifdef __arm__
758764 lldb::addr_t *addr_buf;
759765 uint32_t *ctrl_buf;
760766
761- if (hwbType == eDREGTypeWATCH) {
767+ if (hwbType == NativeRegisterContextDBReg:: eDREGTypeWATCH) {
762768 addr_buf = &m_hwp_regs[hwb_index].address ;
763769 ctrl_buf = &m_hwp_regs[hwb_index].control ;
764770
@@ -795,8 +801,12 @@ Status NativeRegisterContextLinux_arm::WriteHardwareDebugRegs(DREGType hwbType,
795801 return error;
796802#else // __aarch64__
797803 uint32_t max_supported =
798- (hwbType == eDREGTypeWATCH) ? m_max_hwp_supported : m_max_hbp_supported;
799- auto ®s = (hwbType == eDREGTypeWATCH) ? m_hwp_regs : m_hbr_regs;
804+ (hwbType == NativeRegisterContextDBReg::eDREGTypeWATCH)
805+ ? m_max_hwp_supported
806+ : m_max_hbp_supported;
807+ auto ®s = (hwbType == NativeRegisterContextDBReg::eDREGTypeWATCH)
808+ ? m_hwp_regs
809+ : m_hbr_regs;
800810 return arm64::WriteHardwareDebugRegs (hwbType, m_thread.GetID (), max_supported,
801811 regs);
802812#endif // ifdef __arm__
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