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Use range instead of single upper_bound
1 parent 1c75a81 commit a29668d

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4 files changed

+11
-8
lines changed

4 files changed

+11
-8
lines changed

mlir/include/mlir/Dialect/LLVMIR/ROCDLOps.td

Lines changed: 1 addition & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -216,10 +216,7 @@ def ROCDL_BlockIdXOp : ROCDL_SpecialIdRegisterOp<"workgroup.id.x">;
216216
def ROCDL_BlockIdYOp : ROCDL_SpecialIdRegisterOp<"workgroup.id.y">;
217217
def ROCDL_BlockIdZOp : ROCDL_SpecialIdRegisterOp<"workgroup.id.z">;
218218

219-
def ROCDL_WavefrontSizeOp : ROCDL_IntrPure1Op<"wavefrontsize">,
220-
Arguments<(ins OptionalAttr<IndexAttr>:$upper_bound)> {
221-
let assemblyFormat = "(`upper_bound` $upper_bound^)? attr-dict `:` type($res)";
222-
}
219+
def ROCDL_WavefrontSizeOp : ROCDL_SpecialIdRegisterOp<"wavefrontsize">;
223220

224221
//===----------------------------------------------------------------------===//
225222
// Thread range and Block range

mlir/lib/Conversion/GPUToROCDL/LowerGpuOpsToROCDLOps.cpp

Lines changed: 7 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -137,8 +137,14 @@ struct GPUSubgroupSizeOpToROCDL : ConvertOpToLLVMPattern<gpu::SubgroupSizeOp> {
137137
LogicalResult
138138
matchAndRewrite(gpu::SubgroupSizeOp op, gpu::SubgroupSizeOp::Adaptor adaptor,
139139
ConversionPatternRewriter &rewriter) const override {
140+
LLVM::ConstantRangeAttr bounds = nullptr;
141+
if (auto upperBoundAttr = op.getUpperBoundAttr()) {
142+
bounds = rewriter.getAttr<LLVM::ConstantRangeAttr>(
143+
/*bitWidth=*/32, /*lower=*/32,
144+
/*upper=*/op.getUpperBoundAttr().getInt());
145+
}
140146
Value wavefrontOp = rewriter.create<ROCDL::WavefrontSizeOp>(
141-
op.getLoc(), rewriter.getI32Type(), op.getUpperBoundAttr());
147+
op.getLoc(), rewriter.getI32Type(), bounds);
142148
wavefrontOp = truncOrExtToLLVMType(rewriter, op.getLoc(), wavefrontOp,
143149
*getTypeConverter());
144150
rewriter.replaceOp(op, {wavefrontOp});

mlir/test/Conversion/GPUToROCDL/gpu-to-rocdl.mlir

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -63,7 +63,7 @@ gpu.module @test_module {
6363
// CHECK: = llvm.sext %{{.*}} : i32 to i64
6464
%subgroupSize = gpu.subgroup_size : index
6565

66-
// CHECK: = rocdl.wavefrontsize upper_bound 64 : i32
66+
// CHECK: = rocdl.wavefrontsize range <i32, 32, 64> : i32
6767
// CHECK: = llvm.sext %{{.*}} : i32 to i64
6868
%subgroupSize2 = gpu.subgroup_size upper_bound 64 : index
6969

mlir/test/Target/LLVMIR/rocdl.mlir

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -36,8 +36,8 @@ llvm.func @rocdl_special_regs() -> i32 {
3636
// CHECK: call i32 @llvm.amdgcn.wavefrontsize()
3737
%15 = rocdl.wavefrontsize : i32
3838

39-
// CHECK: call i32 @llvm.amdgcn.wavefrontsize()
40-
%16 = rocdl.wavefrontsize upper_bound 32 : i32
39+
// CHECK: call range(i32 32, 64) i32 @llvm.amdgcn.wavefrontsize()
40+
%16 = rocdl.wavefrontsize range <i32, 32, 64> : i32
4141

4242
llvm.return %1 : i32
4343
}

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