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[AMDGPU] Detect trivially uniform arguments in InstCombine
Update one test to use an SGPR argument as the simplest way of getting a uniform value.
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+32
-30
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2 files changed

+32
-30
lines changed

‎llvm/lib/Target/AMDGPU/AMDGPUInstCombineIntrinsic.cpp‎

Lines changed: 2 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -440,6 +440,8 @@ static bool isTriviallyUniform(const Use &U) {
440440
Value *V = U.get();
441441
if (isa<Constant>(V))
442442
return true;
443+
if (const auto *A = dyn_cast<Argument>(V))
444+
return AMDGPU::isArgPassedInSGPR(A);
443445
if (const auto *II = dyn_cast<IntrinsicInst>(V)) {
444446
if (!AMDGPU::isIntrinsicAlwaysUniform(II->getIntrinsicID()))
445447
return false;

‎llvm/test/Transforms/InstCombine/AMDGPU/amdgcn-intrinsics.ll‎

Lines changed: 30 additions & 30 deletions
Original file line numberDiff line numberDiff line change
@@ -66,7 +66,7 @@ define double @test_constant_fold_rcp_f64_43() nounwind {
6666

6767
define float @test_constant_fold_rcp_f32_43_strictfp() nounwind strictfp {
6868
; CHECK-LABEL: @test_constant_fold_rcp_f32_43_strictfp(
69-
; CHECK-NEXT: [[VAL:%.*]] = call float @llvm.amdgcn.rcp.f32(float 4.300000e+01) #[[ATTR14:[0-9]+]]
69+
; CHECK-NEXT: [[VAL:%.*]] = call float @llvm.amdgcn.rcp.f32(float 4.300000e+01) #[[ATTR17:[0-9]+]]
7070
; CHECK-NEXT: ret float [[VAL]]
7171
;
7272
%val = call float @llvm.amdgcn.rcp.f32(float 4.300000e+01) strictfp nounwind readnone
@@ -115,7 +115,7 @@ define half @test_constant_fold_sqrt_f16_0() nounwind {
115115

116116
define float @test_constant_fold_sqrt_f32_0() nounwind {
117117
; CHECK-LABEL: @test_constant_fold_sqrt_f32_0(
118-
; CHECK-NEXT: [[VAL:%.*]] = call float @llvm.amdgcn.sqrt.f32(float 0.000000e+00) #[[ATTR15:[0-9]+]]
118+
; CHECK-NEXT: [[VAL:%.*]] = call float @llvm.amdgcn.sqrt.f32(float 0.000000e+00) #[[ATTR18:[0-9]+]]
119119
; CHECK-NEXT: ret float [[VAL]]
120120
;
121121
%val = call float @llvm.amdgcn.sqrt.f32(float 0.0) nounwind readnone
@@ -124,7 +124,7 @@ define float @test_constant_fold_sqrt_f32_0() nounwind {
124124

125125
define double @test_constant_fold_sqrt_f64_0() nounwind {
126126
; CHECK-LABEL: @test_constant_fold_sqrt_f64_0(
127-
; CHECK-NEXT: [[VAL:%.*]] = call double @llvm.amdgcn.sqrt.f64(double 0.000000e+00) #[[ATTR15]]
127+
; CHECK-NEXT: [[VAL:%.*]] = call double @llvm.amdgcn.sqrt.f64(double 0.000000e+00) #[[ATTR18]]
128128
; CHECK-NEXT: ret double [[VAL]]
129129
;
130130
%val = call double @llvm.amdgcn.sqrt.f64(double 0.0) nounwind readnone
@@ -141,7 +141,7 @@ define half @test_constant_fold_sqrt_f16_neg0() nounwind {
141141

142142
define float @test_constant_fold_sqrt_f32_neg0() nounwind {
143143
; CHECK-LABEL: @test_constant_fold_sqrt_f32_neg0(
144-
; CHECK-NEXT: [[VAL:%.*]] = call float @llvm.amdgcn.sqrt.f32(float -0.000000e+00) #[[ATTR15]]
144+
; CHECK-NEXT: [[VAL:%.*]] = call float @llvm.amdgcn.sqrt.f32(float -0.000000e+00) #[[ATTR18]]
145145
; CHECK-NEXT: ret float [[VAL]]
146146
;
147147
%val = call float @llvm.amdgcn.sqrt.f32(float -0.0) nounwind readnone
@@ -150,7 +150,7 @@ define float @test_constant_fold_sqrt_f32_neg0() nounwind {
150150

151151
define double @test_constant_fold_sqrt_f64_neg0() nounwind {
152152
; CHECK-LABEL: @test_constant_fold_sqrt_f64_neg0(
153-
; CHECK-NEXT: [[VAL:%.*]] = call double @llvm.amdgcn.sqrt.f64(double -0.000000e+00) #[[ATTR15]]
153+
; CHECK-NEXT: [[VAL:%.*]] = call double @llvm.amdgcn.sqrt.f64(double -0.000000e+00) #[[ATTR18]]
154154
; CHECK-NEXT: ret double [[VAL]]
155155
;
156156
%val = call double @llvm.amdgcn.sqrt.f64(double -0.0) nounwind readnone
@@ -718,7 +718,7 @@ define i1 @test_class_isnan_f32(float %x) nounwind {
718718

719719
define i1 @test_class_isnan_f32_strict(float %x) nounwind strictfp {
720720
; CHECK-LABEL: @test_class_isnan_f32_strict(
721-
; CHECK-NEXT: [[VAL:%.*]] = call i1 @llvm.is.fpclass.f32(float [[X:%.*]], i32 3) #[[ATTR16:[0-9]+]]
721+
; CHECK-NEXT: [[VAL:%.*]] = call i1 @llvm.is.fpclass.f32(float [[X:%.*]], i32 3) #[[ATTR19:[0-9]+]]
722722
; CHECK-NEXT: ret i1 [[VAL]]
723723
;
724724
%val = call i1 @llvm.amdgcn.class.f32(float %x, i32 3) strictfp
@@ -736,7 +736,7 @@ define i1 @test_class_is_p0_n0_f32(float %x) nounwind {
736736

737737
define i1 @test_class_is_p0_n0_f32_strict(float %x) nounwind strictfp {
738738
; CHECK-LABEL: @test_class_is_p0_n0_f32_strict(
739-
; CHECK-NEXT: [[VAL:%.*]] = call i1 @llvm.is.fpclass.f32(float [[X:%.*]], i32 96) #[[ATTR16]]
739+
; CHECK-NEXT: [[VAL:%.*]] = call i1 @llvm.is.fpclass.f32(float [[X:%.*]], i32 96) #[[ATTR19]]
740740
; CHECK-NEXT: ret i1 [[VAL]]
741741
;
742742
%val = call i1 @llvm.amdgcn.class.f32(float %x, i32 96) strictfp
@@ -2000,7 +2000,7 @@ define i64 @icmp_constant_inputs_false() {
20002000

20012001
define i64 @icmp_constant_inputs_true() {
20022002
; CHECK-LABEL: @icmp_constant_inputs_true(
2003-
; CHECK-NEXT: [[RESULT:%.*]] = call i64 @llvm.read_register.i64(metadata [[META0:![0-9]+]]) #[[ATTR17:[0-9]+]]
2003+
; CHECK-NEXT: [[RESULT:%.*]] = call i64 @llvm.read_register.i64(metadata [[META0:![0-9]+]]) #[[ATTR20:[0-9]+]]
20042004
; CHECK-NEXT: ret i64 [[RESULT]]
20052005
;
20062006
%result = call i64 @llvm.amdgcn.icmp.i64.i32(i32 9, i32 8, i32 34)
@@ -2707,7 +2707,7 @@ define i64 @fcmp_constant_inputs_false() {
27072707

27082708
define i64 @fcmp_constant_inputs_true() {
27092709
; CHECK-LABEL: @fcmp_constant_inputs_true(
2710-
; CHECK-NEXT: [[RESULT:%.*]] = call i64 @llvm.read_register.i64(metadata [[META0]]) #[[ATTR17]]
2710+
; CHECK-NEXT: [[RESULT:%.*]] = call i64 @llvm.read_register.i64(metadata [[META0]]) #[[ATTR20]]
27112711
; CHECK-NEXT: ret i64 [[RESULT]]
27122712
;
27132713
%result = call i64 @llvm.amdgcn.fcmp.i64.f32(float 2.0, float 4.0, i32 4)
@@ -2845,7 +2845,7 @@ declare i32 @llvm.amdgcn.readfirstlane(i32)
28452845

28462846
@gv = constant i32 0
28472847

2848-
define amdgpu_kernel void @readfirstlane_constant(i32 %arg, ptr %ptr) {
2848+
define amdgpu_cs void @readfirstlane_constant(i32 %arg, ptr %ptr) {
28492849
; CHECK-LABEL: @readfirstlane_constant(
28502850
; CHECK-NEXT: [[VAR:%.*]] = call i32 @llvm.amdgcn.readfirstlane.i32(i32 [[ARG:%.*]])
28512851
; CHECK-NEXT: store volatile i32 [[VAR]], ptr [[PTR:%.*]], align 4
@@ -2931,7 +2931,7 @@ bb1:
29312931

29322932
declare i32 @llvm.amdgcn.readlane(i32, i32)
29332933

2934-
define amdgpu_kernel void @readlane_constant(i32 %arg, i32 %lane, ptr %ptr) {
2934+
define amdgpu_cs void @readlane_constant(i32 %arg, i32 %lane, ptr %ptr) {
29352935
; CHECK-LABEL: @readlane_constant(
29362936
; CHECK-NEXT: [[VAR:%.*]] = call i32 @llvm.amdgcn.readlane.i32(i32 [[ARG:%.*]], i32 7)
29372937
; CHECK-NEXT: store volatile i32 [[VAR]], ptr [[PTR:%.*]], align 4
@@ -3143,14 +3143,12 @@ define amdgpu_kernel void @permlanex16_fetch_invalid_bound_ctrl(ptr addrspace(1)
31433143
; llvm.amdgcn.permlane64
31443144
; --------------------------------------------------------------------
31453145

3146-
define amdgpu_kernel void @permlane64_uniform(ptr addrspace(1) %out, i32 %src0) {
3146+
define amdgpu_kernel void @permlane64_uniform(ptr addrspace(1) %out, i32 %src) {
31473147
; CHECK-LABEL: @permlane64_uniform(
3148-
; CHECK-NEXT: [[SRC1:%.*]] = call i32 @llvm.amdgcn.readfirstlane.i32(i32 [[SRC0:%.*]])
3149-
; CHECK-NEXT: store i32 [[SRC1]], ptr addrspace(1) [[OUT:%.*]], align 4
3148+
; CHECK-NEXT: store i32 [[SRC1:%.*]], ptr addrspace(1) [[OUT:%.*]], align 4
31503149
; CHECK-NEXT: ret void
31513150
;
3152-
%src1 = call i32 @llvm.amdgcn.readfirstlane(i32 %src0)
3153-
%res = call i32 @llvm.amdgcn.permlane64(i32 %src1)
3151+
%res = call i32 @llvm.amdgcn.permlane64(i32 %src)
31543152
store i32 %res, ptr addrspace(1) %out
31553153
ret void
31563154
}
@@ -5845,7 +5843,7 @@ define double @trig_preop_constfold_neg32_segment() {
58455843

58465844
define double @trig_preop_constfold_strictfp() strictfp {
58475845
; CHECK-LABEL: @trig_preop_constfold_strictfp(
5848-
; CHECK-NEXT: [[VAL:%.*]] = call double @llvm.amdgcn.trig.preop.f64(double 3.454350e+02, i32 5) #[[ATTR16]]
5846+
; CHECK-NEXT: [[VAL:%.*]] = call double @llvm.amdgcn.trig.preop.f64(double 3.454350e+02, i32 5) #[[ATTR19]]
58495847
; CHECK-NEXT: ret double [[VAL]]
58505848
;
58515849
%val = call double @llvm.amdgcn.trig.preop.f64(double 3.454350e+02, i32 5) strictfp
@@ -6214,7 +6212,7 @@ define half @test_constant_fold_log_f16_neg10() {
62146212

62156213
define float @test_constant_fold_log_f32_qnan_strictfp() strictfp {
62166214
; CHECK-LABEL: @test_constant_fold_log_f32_qnan_strictfp(
6217-
; CHECK-NEXT: [[VAL:%.*]] = call float @llvm.amdgcn.log.f32(float 0x7FF8000000000000) #[[ATTR16]]
6215+
; CHECK-NEXT: [[VAL:%.*]] = call float @llvm.amdgcn.log.f32(float 0x7FF8000000000000) #[[ATTR19]]
62186216
; CHECK-NEXT: ret float [[VAL]]
62196217
;
62206218
%val = call float @llvm.amdgcn.log.f32(float 0x7FF8000000000000) strictfp
@@ -6223,7 +6221,7 @@ define float @test_constant_fold_log_f32_qnan_strictfp() strictfp {
62236221

62246222
define float @test_constant_fold_log_f32_0_strictfp() strictfp {
62256223
; CHECK-LABEL: @test_constant_fold_log_f32_0_strictfp(
6226-
; CHECK-NEXT: [[VAL:%.*]] = call float @llvm.amdgcn.log.f32(float 0.000000e+00) #[[ATTR16]]
6224+
; CHECK-NEXT: [[VAL:%.*]] = call float @llvm.amdgcn.log.f32(float 0.000000e+00) #[[ATTR19]]
62276225
; CHECK-NEXT: ret float [[VAL]]
62286226
;
62296227
%val = call float @llvm.amdgcn.log.f32(float 0.0) strictfp
@@ -6232,7 +6230,7 @@ define float @test_constant_fold_log_f32_0_strictfp() strictfp {
62326230

62336231
define float @test_constant_fold_log_f32_neg0_strictfp() strictfp {
62346232
; CHECK-LABEL: @test_constant_fold_log_f32_neg0_strictfp(
6235-
; CHECK-NEXT: [[VAL:%.*]] = call float @llvm.amdgcn.log.f32(float -0.000000e+00) #[[ATTR16]]
6233+
; CHECK-NEXT: [[VAL:%.*]] = call float @llvm.amdgcn.log.f32(float -0.000000e+00) #[[ATTR19]]
62366234
; CHECK-NEXT: ret float [[VAL]]
62376235
;
62386236
%val = call float @llvm.amdgcn.log.f32(float -0.0) strictfp
@@ -6241,7 +6239,7 @@ define float @test_constant_fold_log_f32_neg0_strictfp() strictfp {
62416239

62426240
define float @test_constant_fold_log_f32_neg_strictfp() strictfp {
62436241
; CHECK-LABEL: @test_constant_fold_log_f32_neg_strictfp(
6244-
; CHECK-NEXT: [[VAL:%.*]] = call float @llvm.amdgcn.log.f32(float -1.000000e+01) #[[ATTR16]]
6242+
; CHECK-NEXT: [[VAL:%.*]] = call float @llvm.amdgcn.log.f32(float -1.000000e+01) #[[ATTR19]]
62456243
; CHECK-NEXT: ret float [[VAL]]
62466244
;
62476245
%val = call float @llvm.amdgcn.log.f32(float -10.0) strictfp
@@ -6258,7 +6256,7 @@ define float @test_constant_fold_log_f32_pinf_strictfp() strictfp {
62586256

62596257
define float @test_constant_fold_log_f32_ninf_strictfp() strictfp {
62606258
; CHECK-LABEL: @test_constant_fold_log_f32_ninf_strictfp(
6261-
; CHECK-NEXT: [[VAL:%.*]] = call float @llvm.amdgcn.log.f32(float 0xFFF0000000000000) #[[ATTR16]]
6259+
; CHECK-NEXT: [[VAL:%.*]] = call float @llvm.amdgcn.log.f32(float 0xFFF0000000000000) #[[ATTR19]]
62626260
; CHECK-NEXT: ret float [[VAL]]
62636261
;
62646262
%val = call float @llvm.amdgcn.log.f32(float 0xFFF0000000000000) strictfp
@@ -6460,7 +6458,7 @@ define half @test_constant_fold_exp2_f16_neg10() {
64606458

64616459
define float @test_constant_fold_exp2_f32_qnan_strictfp() strictfp {
64626460
; CHECK-LABEL: @test_constant_fold_exp2_f32_qnan_strictfp(
6463-
; CHECK-NEXT: [[VAL:%.*]] = call float @llvm.amdgcn.exp2.f32(float 0x7FF8000000000000) #[[ATTR16]]
6461+
; CHECK-NEXT: [[VAL:%.*]] = call float @llvm.amdgcn.exp2.f32(float 0x7FF8000000000000) #[[ATTR19]]
64646462
; CHECK-NEXT: ret float [[VAL]]
64656463
;
64666464
%val = call float @llvm.amdgcn.exp2.f32(float 0x7FF8000000000000) strictfp
@@ -6469,7 +6467,7 @@ define float @test_constant_fold_exp2_f32_qnan_strictfp() strictfp {
64696467

64706468
define float @test_constant_fold_exp2_f32_0_strictfp() strictfp {
64716469
; CHECK-LABEL: @test_constant_fold_exp2_f32_0_strictfp(
6472-
; CHECK-NEXT: [[VAL:%.*]] = call float @llvm.amdgcn.exp2.f32(float 0.000000e+00) #[[ATTR16]]
6470+
; CHECK-NEXT: [[VAL:%.*]] = call float @llvm.amdgcn.exp2.f32(float 0.000000e+00) #[[ATTR19]]
64736471
; CHECK-NEXT: ret float [[VAL]]
64746472
;
64756473
%val = call float @llvm.amdgcn.exp2.f32(float 0.0) strictfp
@@ -6478,7 +6476,7 @@ define float @test_constant_fold_exp2_f32_0_strictfp() strictfp {
64786476

64796477
define float @test_constant_fold_exp2_f32_neg0_strictfp() strictfp {
64806478
; CHECK-LABEL: @test_constant_fold_exp2_f32_neg0_strictfp(
6481-
; CHECK-NEXT: [[VAL:%.*]] = call float @llvm.amdgcn.exp2.f32(float -0.000000e+00) #[[ATTR16]]
6479+
; CHECK-NEXT: [[VAL:%.*]] = call float @llvm.amdgcn.exp2.f32(float -0.000000e+00) #[[ATTR19]]
64826480
; CHECK-NEXT: ret float [[VAL]]
64836481
;
64846482
%val = call float @llvm.amdgcn.exp2.f32(float -0.0) strictfp
@@ -6487,7 +6485,7 @@ define float @test_constant_fold_exp2_f32_neg0_strictfp() strictfp {
64876485

64886486
define float @test_constant_fold_exp2_f32_1_strictfp() strictfp {
64896487
; CHECK-LABEL: @test_constant_fold_exp2_f32_1_strictfp(
6490-
; CHECK-NEXT: [[VAL:%.*]] = call float @llvm.amdgcn.exp2.f32(float 1.000000e+00) #[[ATTR16]]
6488+
; CHECK-NEXT: [[VAL:%.*]] = call float @llvm.amdgcn.exp2.f32(float 1.000000e+00) #[[ATTR19]]
64916489
; CHECK-NEXT: ret float [[VAL]]
64926490
;
64936491
%val = call float @llvm.amdgcn.exp2.f32(float 1.0) strictfp
@@ -6496,7 +6494,7 @@ define float @test_constant_fold_exp2_f32_1_strictfp() strictfp {
64966494

64976495
define float @test_constant_fold_exp2_f32_neg1_strictfp() strictfp {
64986496
; CHECK-LABEL: @test_constant_fold_exp2_f32_neg1_strictfp(
6499-
; CHECK-NEXT: [[VAL:%.*]] = call float @llvm.amdgcn.exp2.f32(float -1.000000e+00) #[[ATTR16]]
6497+
; CHECK-NEXT: [[VAL:%.*]] = call float @llvm.amdgcn.exp2.f32(float -1.000000e+00) #[[ATTR19]]
65006498
; CHECK-NEXT: ret float [[VAL]]
65016499
;
65026500
%val = call float @llvm.amdgcn.exp2.f32(float -1.0) strictfp
@@ -6505,7 +6503,7 @@ define float @test_constant_fold_exp2_f32_neg1_strictfp() strictfp {
65056503

65066504
define float @test_constant_fold_exp2_f32_2_strictfp() strictfp {
65076505
; CHECK-LABEL: @test_constant_fold_exp2_f32_2_strictfp(
6508-
; CHECK-NEXT: [[VAL:%.*]] = call float @llvm.amdgcn.exp2.f32(float 2.000000e+00) #[[ATTR16]]
6506+
; CHECK-NEXT: [[VAL:%.*]] = call float @llvm.amdgcn.exp2.f32(float 2.000000e+00) #[[ATTR19]]
65096507
; CHECK-NEXT: ret float [[VAL]]
65106508
;
65116509
%val = call float @llvm.amdgcn.exp2.f32(float 2.0) strictfp
@@ -6514,7 +6512,7 @@ define float @test_constant_fold_exp2_f32_2_strictfp() strictfp {
65146512

65156513
define float @test_constant_fold_exp2_f32_neg2_strictfp() strictfp {
65166514
; CHECK-LABEL: @test_constant_fold_exp2_f32_neg2_strictfp(
6517-
; CHECK-NEXT: [[VAL:%.*]] = call float @llvm.amdgcn.exp2.f32(float -2.000000e+00) #[[ATTR16]]
6515+
; CHECK-NEXT: [[VAL:%.*]] = call float @llvm.amdgcn.exp2.f32(float -2.000000e+00) #[[ATTR19]]
65186516
; CHECK-NEXT: ret float [[VAL]]
65196517
;
65206518
%val = call float @llvm.amdgcn.exp2.f32(float -2.0) strictfp
@@ -6523,7 +6521,7 @@ define float @test_constant_fold_exp2_f32_neg2_strictfp() strictfp {
65236521

65246522
define float @test_constant_fold_exp2_f32_neg_strictfp() strictfp {
65256523
; CHECK-LABEL: @test_constant_fold_exp2_f32_neg_strictfp(
6526-
; CHECK-NEXT: [[VAL:%.*]] = call float @llvm.amdgcn.exp2.f32(float -1.000000e+01) #[[ATTR16]]
6524+
; CHECK-NEXT: [[VAL:%.*]] = call float @llvm.amdgcn.exp2.f32(float -1.000000e+01) #[[ATTR19]]
65276525
; CHECK-NEXT: ret float [[VAL]]
65286526
;
65296527
%val = call float @llvm.amdgcn.exp2.f32(float -10.0) strictfp
@@ -6571,13 +6569,15 @@ declare i32 @llvm.amdgcn.prng.b32(i32)
65716569
define i32 @prng_undef_i32() {
65726570
; CHECK-LABEL: @prng_undef_i32(
65736571
; CHECK-NEXT: ret i32 undef
6572+
;
65746573
%prng = call i32 @llvm.amdgcn.prng.b32(i32 undef)
65756574
ret i32 %prng
65766575
}
65776576

65786577
define i32 @prng_poison_i32() {
65796578
; CHECK-LABEL: @prng_poison_i32(
65806579
; CHECK-NEXT: ret i32 poison
6580+
;
65816581
%prng = call i32 @llvm.amdgcn.prng.b32(i32 poison)
65826582
ret i32 %prng
65836583
}

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