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llvm/lib/Target/PowerPC/PPCISelLowering.cpp

Lines changed: 5 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -9590,15 +9590,15 @@ bool isValidMtVsrBmi(APInt &BitMask, BuildVectorSDNode &BVN) {
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95919591
unsigned EltWidth = VT.getScalarSizeInBits();
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9593-
for (unsigned J = 0; J < NumOps; ++J) {
9594-
SDValue OpVal = BVN.getOperand(J);
9595-
unsigned BitPos = J * EltWidth;
9593+
unsigned BitPos = 0;
9594+
for (auto OpVal : BVN.op_values()) {
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auto *CN = dyn_cast<ConstantSDNode>(OpVal);
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if (!CN)
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return false;
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ConstValue.insertBits(CN->getAPIntValue().zextOrTrunc(EltWidth), BitPos);
9601+
BitPos += EltWidth;
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}
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96049604
for (unsigned J = 0; J < 16; ++J) {
@@ -9630,7 +9630,8 @@ SDValue PPCTargetLowering::LowerBUILD_VECTOR(SDValue Op,
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// The xxlxor instruction sets a vector with all zeros.
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if (isValidMtVsrBmi(BitMask, *BVN) && BitMask != 0 && BitMask != 0xffff) {
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SDValue SDConstant = DAG.getTargetConstant(BitMask, dl, MVT::i32);
9633-
MachineSDNode* MSDNode = DAG.getMachineNode(PPC::MTVSRBMI, dl,MVT::v16i8, SDConstant);
9633+
MachineSDNode *MSDNode =
9634+
DAG.getMachineNode(PPC::MTVSRBMI, dl, MVT::v16i8, SDConstant);
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SDValue SDV = SDValue(MSDNode, 0);
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EVT DVT = BVN->getValueType(0);
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EVT SVT = SDV.getValueType();

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