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bug fixes
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2 files changed

+9
-8
lines changed

2 files changed

+9
-8
lines changed

llvm/lib/Target/AMDGPU/SIPreEmitPeephole.cpp

Lines changed: 7 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -713,8 +713,8 @@ MachineInstrBuilder SIPreEmitPeephole::createUnpackedMI(MachineInstr &I,
713713
bool IsHiBits) {
714714
MachineBasicBlock &MBB = *I.getParent();
715715
const DebugLoc &DL = I.getDebugLoc();
716-
const MachineOperand *SrcMO1 = TII->getNamedOperand(I, AMDGPU::OpName::src0);
717-
const MachineOperand *SrcMO2 = TII->getNamedOperand(I, AMDGPU::OpName::src1);
716+
const MachineOperand *SrcMO0 = TII->getNamedOperand(I, AMDGPU::OpName::src0);
717+
const MachineOperand *SrcMO1 = TII->getNamedOperand(I, AMDGPU::OpName::src1);
718718
Register DstReg = I.getOperand(0).getReg();
719719
unsigned OpCode = I.getOpcode();
720720
Register UnpackedDstReg = IsHiBits ? TRI->getSubReg(DstReg, AMDGPU::sub1)
@@ -730,11 +730,12 @@ MachineInstrBuilder SIPreEmitPeephole::createUnpackedMI(MachineInstr &I,
730730
NewMI.addDef(UnpackedDstReg); // vdst
731731
if (AMDGPU::hasNamedOperand(UnpackedOpcode, AMDGPU::OpName::src0) &&
732732
AMDGPU::hasNamedOperand(UnpackedOpcode, AMDGPU::OpName::src1)) {
733-
addOperandAndMods(NewMI, Src0Mods, IsHiBits, *SrcMO1);
734-
addOperandAndMods(NewMI, Src1Mods, IsHiBits, *SrcMO2);
733+
addOperandAndMods(NewMI, Src0Mods, IsHiBits, *SrcMO0);
734+
addOperandAndMods(NewMI, Src1Mods, IsHiBits, *SrcMO1);
735735
} else {
736-
const MachineOperand *SrcMO = IsHiBits ? SrcMO2 : SrcMO1;
737-
addOperandAndMods(NewMI, Src1Mods, IsHiBits, *SrcMO);
736+
const MachineOperand *SrcMO = IsHiBits ? SrcMO1 : SrcMO0;
737+
unsigned SrcMods = IsHiBits ? Src1Mods : Src0Mods;
738+
addOperandAndMods(NewMI, SrcMods, IsHiBits, *SrcMO);
738739
}
739740

740741
if (AMDGPU::hasNamedOperand(OpCode, AMDGPU::OpName::src2)) {

llvm/test/CodeGen/AMDGPU/unpack-non-coissue-insts-post-ra-scheduler.mir

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -1687,7 +1687,7 @@ body: |
16871687
; GFX950-NEXT: $vgpr10 = V_MOV_B32_e32 killed $sgpr6, implicit $exec, implicit $exec
16881688
; GFX950-NEXT: $vgpr11 = V_MOV_B32_e32 killed $sgpr7, implicit $exec, implicit $exec
16891689
; GFX950-NEXT: early-clobber renamable $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7_agpr8_agpr9_agpr10_agpr11_agpr12_agpr13_agpr14_agpr15 = V_MFMA_F32_32X32X16_F16_e64 $vgpr0_vgpr1_vgpr2_vgpr3, $vgpr4_vgpr5_vgpr6_vgpr7, 0, 0, 0, 0, implicit $mode, implicit $exec
1690-
; GFX950-NEXT: $vgpr4 = V_MOV_B32_e32 killed $vgpr0, implicit $exec
1690+
; GFX950-NEXT: $vgpr4 = V_MOV_B32_e32 killed $vgpr1, implicit $exec
16911691
; GFX950-NEXT: $vgpr5 = V_MOV_B32_e32 killed $vgpr2, implicit $exec
16921692
; GFX950-NEXT: S_ENDPGM 0
16931693
;
@@ -1707,7 +1707,7 @@ body: |
17071707
; GFX942-NEXT: $vgpr10 = V_MOV_B32_e32 killed $sgpr6, implicit $exec, implicit $exec
17081708
; GFX942-NEXT: $vgpr11 = V_MOV_B32_e32 killed $sgpr7, implicit $exec, implicit $exec
17091709
; GFX942-NEXT: early-clobber renamable $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7_agpr8_agpr9_agpr10_agpr11_agpr12_agpr13_agpr14_agpr15 = V_MFMA_F32_32X32X16_F16_e64 $vgpr0_vgpr1_vgpr2_vgpr3, $vgpr4_vgpr5_vgpr6_vgpr7, 0, 0, 0, 0, implicit $mode, implicit $exec
1710-
; GFX942-NEXT: $vgpr4 = V_MOV_B32_e32 killed $vgpr0, implicit $exec
1710+
; GFX942-NEXT: $vgpr4 = V_MOV_B32_e32 killed $vgpr1, implicit $exec
17111711
; GFX942-NEXT: $vgpr5 = V_MOV_B32_e32 killed $vgpr2, implicit $exec
17121712
; GFX942-NEXT: S_ENDPGM 0
17131713
;

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