Address code review comments

Author: AmrDeveloper

clang/lib/CIR/CodeGen/CIRGenExprScalar.cpp

@@ -2353,7 +2353,7 @@ mlir::Value ScalarExprEmitter::VisitUnaryExprOrTypeTraitExpr(
 
         // For sizeof and __datasizeof, we need to scale the number of elements
         // by the size of the array element type.
-        auto vlaSize = cgf.getVLASize(vat);
+        CIRGenFunction::VlaSizePair vlaSize = cgf.getVLASize(vat);
         mlir::Value numElts = vlaSize.numElts;
 
         // Scale the number of non-VLA elements by the non-VLA element size.
@@ -2363,7 +2363,8 @@ mlir::Value ScalarExprEmitter::VisitUnaryExprOrTypeTraitExpr(
           mlir::Value eltSizeValue =
               builder.getConstAPInt(numElts.getLoc(), numElts.getType(),
                                     cgf.cgm.getSize(eltSize).getValue());
-          return builder.createMul(loc, eltSizeValue, numElts);
+          return builder.createMul(loc, eltSizeValue, numElts,
+                                   cir::OverflowBehavior::NoUnsignedWrap);
         }
 
         return numElts;

clang/test/CIR/CodeGen/size-of-vla.cpp

@@ -40,14 +40,14 @@ void vla_type_with_element_type_int() {
 // CIR: cir.store {{.*}} %[[CONST_10]], %[[N_ADDR]] : !u64i, !cir.ptr<!u64i>
 // CIR: %3 = cir.load {{.*}} %[[N_ADDR]] : !cir.ptr<!u64i>, !u64i
 // CIR: %[[CONST_4:.*]] = cir.const #cir.int<4> : !u64i
-// CIR: %[[SIZE:.*]] = cir.binop(mul, %[[CONST_4]], %3) : !u64i
+// CIR: %[[SIZE:.*]] = cir.binop(mul, %[[CONST_4]], %3) nuw : !u64i
 // CIR: cir.store {{.*}} %[[SIZE]], %[[SIZE_ADDR]] : !u64i, !cir.ptr<!u64i>
 
 // LLVM: %[[N_ADDR:.*]] = alloca i64, i64 1, align 8
 // LLVM: %[[SIZE_ADDR:.*]] = alloca i64, i64 1, align 8
 // LLVM: store i64 10, ptr %[[N_ADDR]], align 8
 // LLVM: %[[TMP_N:.*]] = load i64, ptr %[[N_ADDR]], align 8
-// LLVM: %[[SIZE:.*]] = mul i64 4, %[[TMP_N]]
+// LLVM: %[[SIZE:.*]] = mul nuw i64 4, %[[TMP_N]]
 // LLVM: store i64 %[[SIZE]], ptr %[[SIZE_ADDR]], align 8
 
 // OGCG: %[[N_ADDR:.*]] = alloca i64, align 8
@@ -120,7 +120,7 @@ void vla_expr_element_type_int() {
 // CIR: %[[ARR_ADDR:.*]] = cir.alloca !s32i, !cir.ptr<!s32i>, %[[TMP_N]] : !u64i, ["arr"]
 // CIR: %[[SIZE_ADDR:.*]] = cir.alloca !u64i, !cir.ptr<!u64i>, ["size", init]
 // CIR: %[[CONST_4:.*]] = cir.const #cir.int<4> : !u64i
-// CIR: %[[SIZE:.*]] = cir.binop(mul, %[[CONST_4]], %[[TMP_N]]) : !u64i
+// CIR: %[[SIZE:.*]] = cir.binop(mul, %[[CONST_4]], %[[TMP_N]]) nuw : !u64i
 // CIR: cir.store {{.*}} %[[SIZE]], %[[SIZE_ADDR]] : !u64i, !cir.ptr<!u64i>
 // CIR: %[[TMP_SAVED_STACK:.*]] = cir.load {{.*}} %[[SAVED_STACK_ADDR]] : !cir.ptr<!cir.ptr<!u8i>>, !cir.ptr<!u8i>
 // CIR: cir.stackrestore %[[TMP_SAVED_STACK]] : !cir.ptr<!u8i>
@@ -133,7 +133,7 @@ void vla_expr_element_type_int() {
 // LLVM: store ptr %[[STACK_SAVE]], ptr %[[SAVED_STACK_ADDR]], align 8
 // LLVM: %[[ARR_ADDR:.*]] = alloca i32, i64 %[[TMP_N]], align 16
 // LLVM: %[[SIZE_ADDR:.*]] = alloca i64, i64 1, align 8
-// LLVM: %[[SIZE:.*]] = mul i64 4, %[[TMP_N]]
+// LLVM: %[[SIZE:.*]] = mul nuw i64 4, %[[TMP_N]]
 // LLVM: store i64 %[[SIZE]], ptr %[[SIZE_ADDR]], align 8
 // LLVM: %[[TMP_SAVED_STACK:.*]] = load ptr, ptr %[[SAVED_STACK_ADDR]], align 8
 // LLVM: call void @llvm.stackrestore.p0(ptr %[[TMP_SAVED_STACK]])