@@ -78,20 +78,20 @@ _mm512_maskz_cvtbiasph_bf8(__mmask32 __U, __m512i __A, __m512h __B) {
7878}
7979
8080static __inline__ __m256i __DEFAULT_FN_ATTRS512
81- _mm512_cvtbiassph_bf8 (__m512i __A , __m512h __B ) {
81+ _mm512_cvts_biasph_bf8 (__m512i __A , __m512h __B ) {
8282 return (__m256i )__builtin_ia32_vcvtbiasph2bf8s_512_mask (
8383 (__v64qi )__A , (__v32hf )__B , (__v32qi )_mm256_undefined_si256 (),
8484 (__mmask32 )- 1 );
8585}
8686
87- static __inline__ __m256i __DEFAULT_FN_ATTRS512 _mm512_mask_cvtbiassph_bf8 (
87+ static __inline__ __m256i __DEFAULT_FN_ATTRS512 _mm512_mask_cvts_biasph_bf8 (
8888 __m256i __W , __mmask32 __U , __m512i __A , __m512h __B ) {
8989 return (__m256i )__builtin_ia32_vcvtbiasph2bf8s_512_mask (
9090 (__v64qi )__A , (__v32hf )__B , (__v32qi )(__m256i )__W , (__mmask32 )__U );
9191}
9292
9393static __inline__ __m256i __DEFAULT_FN_ATTRS512
94- _mm512_maskz_cvtbiassph_bf8 (__mmask32 __U , __m512i __A , __m512h __B ) {
94+ _mm512_maskz_cvts_biasph_bf8 (__mmask32 __U , __m512i __A , __m512h __B ) {
9595 return (__m256i )__builtin_ia32_vcvtbiasph2bf8s_512_mask (
9696 (__v64qi )__A , (__v32hf )__B , (__v32qi )(__m256i )_mm256_setzero_si256 (),
9797 (__mmask32 )__U );
@@ -118,20 +118,20 @@ _mm512_maskz_cvtbiasph_hf8(__mmask32 __U, __m512i __A, __m512h __B) {
118118}
119119
120120static __inline__ __m256i __DEFAULT_FN_ATTRS512
121- _mm512_cvtbiassph_hf8 (__m512i __A , __m512h __B ) {
121+ _mm512_cvts_biasph_hf8 (__m512i __A , __m512h __B ) {
122122 return (__m256i )__builtin_ia32_vcvtbiasph2hf8s_512_mask (
123123 (__v64qi )__A , (__v32hf )__B , (__v32qi )_mm256_undefined_si256 (),
124124 (__mmask32 )- 1 );
125125}
126126
127- static __inline__ __m256i __DEFAULT_FN_ATTRS512 _mm512_mask_cvtbiassph_hf8 (
127+ static __inline__ __m256i __DEFAULT_FN_ATTRS512 _mm512_mask_cvts_biasph_hf8 (
128128 __m256i __W , __mmask32 __U , __m512i __A , __m512h __B ) {
129129 return (__m256i )__builtin_ia32_vcvtbiasph2hf8s_512_mask (
130130 (__v64qi )__A , (__v32hf )__B , (__v32qi )(__m256i )__W , (__mmask32 )__U );
131131}
132132
133133static __inline__ __m256i __DEFAULT_FN_ATTRS512
134- _mm512_maskz_cvtbiassph_hf8 (__mmask32 __U , __m512i __A , __m512h __B ) {
134+ _mm512_maskz_cvts_biasph_hf8 (__mmask32 __U , __m512i __A , __m512h __B ) {
135135 return (__m256i )__builtin_ia32_vcvtbiasph2hf8s_512_mask (
136136 (__v64qi )__A , (__v32hf )__B , (__v32qi )(__m256i )_mm256_setzero_si256 (),
137137 (__mmask32 )__U );
@@ -157,21 +157,21 @@ _mm512_maskz_cvt2ph_bf8(__mmask64 __U, __m512h __A, __m512h __B) {
157157}
158158
159159static __inline__ __m512i __DEFAULT_FN_ATTRS512
160- _mm512_cvts2ph_bf8 (__m512h __A , __m512h __B ) {
160+ _mm512_cvts_2ph_bf8 (__m512h __A , __m512h __B ) {
161161 return (__m512i )__builtin_ia32_vcvt2ph2bf8s_512 ((__v32hf )(__A ),
162162 (__v32hf )(__B ));
163163}
164164
165165static __inline__ __m512i __DEFAULT_FN_ATTRS512
166- _mm512_mask_cvts2ph_bf8 (__m512i __W , __mmask64 __U , __m512h __A , __m512h __B ) {
166+ _mm512_mask_cvts_2ph_bf8 (__m512i __W , __mmask64 __U , __m512h __A , __m512h __B ) {
167167 return (__m512i )__builtin_ia32_selectb_512 (
168- (__mmask64 )__U , (__v64qi )_mm512_cvts2ph_bf8 (__A , __B ), (__v64qi )__W );
168+ (__mmask64 )__U , (__v64qi )_mm512_cvts_2ph_bf8 (__A , __B ), (__v64qi )__W );
169169}
170170
171171static __inline__ __m512i __DEFAULT_FN_ATTRS512
172- _mm512_maskz_cvts2ph_bf8 (__mmask64 __U , __m512h __A , __m512h __B ) {
172+ _mm512_maskz_cvts_2ph_bf8 (__mmask64 __U , __m512h __A , __m512h __B ) {
173173 return (__m512i )__builtin_ia32_selectb_512 (
174- (__mmask64 )__U , (__v64qi )_mm512_cvts2ph_bf8 (__A , __B ),
174+ (__mmask64 )__U , (__v64qi )_mm512_cvts_2ph_bf8 (__A , __B ),
175175 (__v64qi )(__m512i )_mm512_setzero_si512 ());
176176}
177177
@@ -195,21 +195,21 @@ _mm512_maskz_cvt2ph_hf8(__mmask64 __U, __m512h __A, __m512h __B) {
195195}
196196
197197static __inline__ __m512i __DEFAULT_FN_ATTRS512
198- _mm512_cvts2ph_hf8 (__m512h __A , __m512h __B ) {
198+ _mm512_cvts_2ph_hf8 (__m512h __A , __m512h __B ) {
199199 return (__m512i )__builtin_ia32_vcvt2ph2hf8s_512 ((__v32hf )(__A ),
200200 (__v32hf )(__B ));
201201}
202202
203203static __inline__ __m512i __DEFAULT_FN_ATTRS512
204- _mm512_mask_cvts2ph_hf8 (__m512i __W , __mmask64 __U , __m512h __A , __m512h __B ) {
204+ _mm512_mask_cvts_2ph_hf8 (__m512i __W , __mmask64 __U , __m512h __A , __m512h __B ) {
205205 return (__m512i )__builtin_ia32_selectb_512 (
206- (__mmask64 )__U , (__v64qi )_mm512_cvts2ph_hf8 (__A , __B ), (__v64qi )__W );
206+ (__mmask64 )__U , (__v64qi )_mm512_cvts_2ph_hf8 (__A , __B ), (__v64qi )__W );
207207}
208208
209209static __inline__ __m512i __DEFAULT_FN_ATTRS512
210- _mm512_maskz_cvts2ph_hf8 (__mmask64 __U , __m512h __A , __m512h __B ) {
210+ _mm512_maskz_cvts_2ph_hf8 (__mmask64 __U , __m512h __A , __m512h __B ) {
211211 return (__m512i )__builtin_ia32_selectb_512 (
212- (__mmask64 )__U , (__v64qi )_mm512_cvts2ph_hf8 (__A , __B ),
212+ (__mmask64 )__U , (__v64qi )_mm512_cvts_2ph_hf8 (__A , __B ),
213213 (__v64qi )(__m512i )_mm512_setzero_si512 ());
214214}
215215
@@ -247,19 +247,20 @@ _mm512_maskz_cvtph_bf8(__mmask32 __U, __m512h __A) {
247247 (__v32hf )__A , (__v32qi )(__m256i )_mm256_setzero_si256 (), (__mmask32 )__U );
248248}
249249
250- static __inline__ __m256i __DEFAULT_FN_ATTRS512 _mm512_cvtsph_bf8 (__m512h __A ) {
250+ static __inline__ __m256i __DEFAULT_FN_ATTRS512
251+ _mm512_cvts_ph_bf8 (__m512h __A ) {
251252 return (__m256i )__builtin_ia32_vcvtph2bf8s_512_mask (
252253 (__v32hf )__A , (__v32qi )(__m256i )_mm256_undefined_si256 (), (__mmask32 )- 1 );
253254}
254255
255256static __inline__ __m256i __DEFAULT_FN_ATTRS512
256- _mm512_mask_cvtsph_bf8 (__m256i __W , __mmask32 __U , __m512h __A ) {
257+ _mm512_mask_cvts_ph_bf8 (__m256i __W , __mmask32 __U , __m512h __A ) {
257258 return (__m256i )__builtin_ia32_vcvtph2bf8s_512_mask (
258259 (__v32hf )__A , (__v32qi )(__m256i )__W , (__mmask32 )__U );
259260}
260261
261262static __inline__ __m256i __DEFAULT_FN_ATTRS512
262- _mm512_maskz_cvtsph_bf8 (__mmask32 __U , __m512h __A ) {
263+ _mm512_maskz_cvts_ph_bf8 (__mmask32 __U , __m512h __A ) {
263264 return (__m256i )__builtin_ia32_vcvtph2bf8s_512_mask (
264265 (__v32hf )__A , (__v32qi )(__m256i )_mm256_setzero_si256 (), (__mmask32 )__U );
265266}
@@ -281,19 +282,20 @@ _mm512_maskz_cvtph_hf8(__mmask32 __U, __m512h __A) {
281282 (__v32hf )__A , (__v32qi )(__m256i )_mm256_setzero_si256 (), (__mmask32 )__U );
282283}
283284
284- static __inline__ __m256i __DEFAULT_FN_ATTRS512 _mm512_cvtsph_hf8 (__m512h __A ) {
285+ static __inline__ __m256i __DEFAULT_FN_ATTRS512
286+ _mm512_cvts_ph_hf8 (__m512h __A ) {
285287 return (__m256i )__builtin_ia32_vcvtph2hf8s_512_mask (
286288 (__v32hf )__A , (__v32qi )(__m256i )_mm256_undefined_si256 (), (__mmask32 )- 1 );
287289}
288290
289291static __inline__ __m256i __DEFAULT_FN_ATTRS512
290- _mm512_mask_cvtsph_hf8 (__m256i __W , __mmask32 __U , __m512h __A ) {
292+ _mm512_mask_cvts_ph_hf8 (__m256i __W , __mmask32 __U , __m512h __A ) {
291293 return (__m256i )__builtin_ia32_vcvtph2hf8s_512_mask (
292294 (__v32hf )__A , (__v32qi )(__m256i )__W , (__mmask32 )__U );
293295}
294296
295297static __inline__ __m256i __DEFAULT_FN_ATTRS512
296- _mm512_maskz_cvtsph_hf8 (__mmask32 __U , __m512h __A ) {
298+ _mm512_maskz_cvts_ph_hf8 (__mmask32 __U , __m512h __A ) {
297299 return (__m256i )__builtin_ia32_vcvtph2hf8s_512_mask (
298300 (__v32hf )__A , (__v32qi )(__m256i )_mm256_setzero_si256 (), (__mmask32 )__U );
299301}
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