[AMDGPU] Add s-cluster-barrier.ll test. NFC

Author: rampitec

llvm/test/CodeGen/AMDGPU/s-cluster-barrier.ll

@@ -0,0 +1,34 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
+; RUN: llc -global-isel=0 -mtriple=amdgcn -mcpu=gfx1250 < %s | FileCheck -check-prefixes=GFX12,GFX12-SDAG %s
+; RUN: llc -global-isel=0 -mtriple=amdgcn -mcpu=gfx1250 < %s | FileCheck -check-prefixes=GFX12,GFX12-ISEL %s
+
+define amdgpu_kernel void @kernel1() #0 {
+; GFX12-LABEL: kernel1:
+; GFX12:       ; %bb.0:
+; GFX12-NEXT:    s_cmp_eq_u32 0, 0
+; GFX12-NEXT:    s_barrier_signal_isfirst -1
+; GFX12-NEXT:    s_barrier_wait -1
+; GFX12-NEXT:    s_cselect_b32 s0, -1, 0
+; GFX12-NEXT:    s_delay_alu instid0(SALU_CYCLE_1)
+; GFX12-NEXT:    s_and_not1_b32 vcc_lo, exec_lo, s0
+; GFX12-NEXT:    s_cbranch_vccnz .LBB0_2
+; GFX12-NEXT:  ; %bb.1:
+; GFX12-NEXT:    s_barrier_signal -3
+; GFX12-NEXT:  .LBB0_2:
+; GFX12-NEXT:    s_barrier_wait -3
+; GFX12-NEXT:    s_get_barrier_state s0, -3
+; GFX12-NEXT:    s_endpgm
+    call void @llvm.amdgcn.s.cluster.barrier()
+    %state3 = call i32 @llvm.amdgcn.s.get.barrier.state(i32 -3)
+    ret void
+}
+
+declare void @llvm.amdgcn.s.cluster.barrier() #1
+declare i32 @llvm.amdgcn.s.get.barrier.state(i32) #1
+
+attributes #0 = { nounwind }
+attributes #1 = { convergent nounwind }
+attributes #2 = { nounwind readnone }
+;; NOTE: These prefixes are unused and the list is autogenerated. Do not add tests below this line:
+; GFX12-ISEL: {{.*}}
+; GFX12-SDAG: {{.*}}