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add tests
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mlir/test/Dialect/XeGPU/subgroup-map-propagation.mlir

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@@ -561,3 +561,62 @@ func.func @test_vector_inner_reduction(%arg0: vector<16x16xf32>, %arg1: !xegpu.t
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xegpu.store_nd %0, %arg1 : vector<16xf32>, !xegpu.tensor_desc<16xf32>
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return
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}
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// -----
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// CHECK: function: update_nd_offset_1d:
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// CHECK: op : %[[CST:.*]] = arith.constant dense<1.000000e+00> : vector<16xf32>
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// CHECK-NEXT: layout for result #0: lane_layout: [16], lane_data: [1]
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// CHECK-NEXT: op : %[[T0:.*]] = xegpu.create_nd_tdesc %{{.*}}[%{{.*}}] : memref<256xf32> -> !xegpu.tensor_desc<16xf32>
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// CHECK-NEXT: layout for result #0: lane_layout: [16], lane_data: [1]
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// CHECK-NEXT: op : %[[T1:.*]] = xegpu.update_nd_offset %[[T0]], [%{{.*}}] : !xegpu.tensor_desc<16xf32>
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// CHECK-NEXT: layout for result #0: lane_layout: [16], lane_data: [1]
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func.func @update_nd_offset_1d(%arg0: memref<256xf32>){
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%c0 = arith.constant 0 : index
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%c32 = arith.constant 32 : index
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%1 = arith.constant dense<1.000000e+00> : vector<16xf32>
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%0 = xegpu.create_nd_tdesc %arg0[%c0] : memref<256xf32> -> !xegpu.tensor_desc<16xf32>
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%2 = xegpu.update_nd_offset %0, [%c32] : !xegpu.tensor_desc<16xf32>
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xegpu.store_nd %1, %2 : vector<16xf32>, !xegpu.tensor_desc<16xf32>
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return
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}
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// -----
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// CHECK: function: update_nd_offset_2d:
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// CHECK: op : %[[CST:.*]] = arith.constant dense<1.000000e+00> : vector<16x16xf32>
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// CHECK-NEXT: layout for result #0: lane_layout: [1, 16], lane_data: [1, 1]
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// CHECK-NEXT: op : %[[T0:.*]] = xegpu.create_nd_tdesc %{{.*}}[%{{.*}}] : memref<256x256xf32> -> !xegpu.tensor_desc<16x16xf32>
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// CHECK-NEXT: layout for result #0: lane_layout: [1, 16], lane_data: [1, 1]
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// CHECK-NEXT: op : %[[T1:.*]] = xegpu.update_nd_offset %[[T0]], [%{{.*}}] : !xegpu.tensor_desc<16x16xf32>
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// CHECK-NEXT: layout for result #0: lane_layout: [1, 16], lane_data: [1, 1]
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func.func @update_nd_offset_2d(%arg0: memref<256x256xf32>){
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%c0 = arith.constant 0 : index
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%c32 = arith.constant 32 : index
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%1 = arith.constant dense<1.000000e+00> : vector<16x16xf32>
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%0 = xegpu.create_nd_tdesc %arg0[%c0, %c0] : memref<256x256xf32> -> !xegpu.tensor_desc<16x16xf32>
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%2 = xegpu.update_nd_offset %0, [%c32, %c32] : !xegpu.tensor_desc<16x16xf32>
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xegpu.store_nd %1, %2 : vector<16x16xf32>, !xegpu.tensor_desc<16x16xf32>
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return
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}
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// -----
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// CHECK: function: prefetch_2d:
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// CHECK: layout for result #0: Not assigned.
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// CHECK-NEXT: op : %[[T0:.*]] = xegpu.create_nd_tdesc %{{.*}}[%{{.*}}] : memref<256x256xf16> -> !xegpu.tensor_desc<16x16xf16>
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// CHECK-NEXT: layout for result #0: lane_layout: [1, 16], lane_data: [1, 1]
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func.func @prefetch_2d(%arg0: memref<256x256xf16>){
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%c0 = arith.constant 0 : index
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%0 = xegpu.create_nd_tdesc %arg0[%c0, %c0] : memref<256x256xf16> -> !xegpu.tensor_desc<16x16xf16>
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xegpu.prefetch_nd %0 <{l1_hint = #xegpu.cache_hint<cached>, l2_hint = #xegpu.cache_hint<uncached>}>: !xegpu.tensor_desc<16x16xf16>
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return
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}
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// -----
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// CHECK: function: prefetch_1d:
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// CHECK: op : %[[T0:.*]] = xegpu.create_nd_tdesc %{{.*}}[%{{.*}}] : memref<256xf16> -> !xegpu.tensor_desc<16xf16>
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// CHECK-NEXT: layout for result #0: lane_layout: [16], lane_data: [1]
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func.func @prefetch_1d(%arg0: memref<256xf16>){
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%c0 = arith.constant 0 : index
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%0 = xegpu.create_nd_tdesc %arg0[%c0] : memref<256xf16> -> !xegpu.tensor_desc<16xf16>
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xegpu.prefetch_nd %0 <{l1_hint = #xegpu.cache_hint<cached>, l2_hint = #xegpu.cache_hint<uncached>}>: !xegpu.tensor_desc<16xf16>
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return
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}

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