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1 parent f87a9db commit a773c26Copy full SHA for a773c26
llvm/test/Transforms/InstCombine/rem-mul-shl.ll
@@ -372,6 +372,17 @@ define <2 x i8> @srem_XY_XZ_with_CY_gt_CZ_no_nuw_out(<2 x i8> %X) {
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ret <2 x i8> %r
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}
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+define i8 @srem_XY_XZ_with_CY_gt_CZ_drop_nsw(i8 noundef %X) {
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+; CHECK-LABEL: @srem_XY_XZ_with_CY_gt_CZ_drop_nsw(
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+; CHECK-NEXT: [[R:%.*]] = sub nsw i8 0, [[X:%.*]]
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+; CHECK-NEXT: ret i8 [[R]]
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+;
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+ %BO0 = mul nsw i8 %X, 127
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+ %BO1 = shl nsw i8 %X, 7
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+ %r = srem i8 %BO1, %BO0
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+ ret i8 %r
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+}
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+
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define i8 @srem_XY_XZ_with_CY_gt_CZ_fail_missing_flag1(i8 %X) {
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; CHECK-LABEL: @srem_XY_XZ_with_CY_gt_CZ_fail_missing_flag1(
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; CHECK-NEXT: [[BO0:%.*]] = mul nuw nsw i8 [[X:%.*]], 10
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