@@ -806,28 +806,28 @@ static bool isPop(unsigned Opcode) {
806806 }
807807}
808808
809- static unsigned getPushOpcode (RISCVMachineFunctionInfo::PushKind Kind,
810- bool hasFP ) {
809+ static unsigned getPushOpcode (RISCVMachineFunctionInfo::PushPopKind Kind,
810+ bool HasFP ) {
811811 switch (Kind) {
812- case RISCVMachineFunctionInfo::PushKind ::StdExtZcmp:
812+ case RISCVMachineFunctionInfo::PushPopKind ::StdExtZcmp:
813813 return RISCV::CM_PUSH;
814- case RISCVMachineFunctionInfo::PushKind ::VendorXqccmp:
815- return hasFP ? RISCV::QC_CM_PUSHFP : RISCV::QC_CM_PUSH;
814+ case RISCVMachineFunctionInfo::PushPopKind ::VendorXqccmp:
815+ return HasFP ? RISCV::QC_CM_PUSHFP : RISCV::QC_CM_PUSH;
816816 default :
817- llvm_unreachable (" Unhandled PushKind " );
817+ llvm_unreachable (" Unhandled PushPopKind " );
818818 }
819819}
820820
821- static unsigned getPopOpcode (RISCVMachineFunctionInfo::PushKind Kind) {
821+ static unsigned getPopOpcode (RISCVMachineFunctionInfo::PushPopKind Kind) {
822822 // There are other pops but they are introduced later by the Push/Pop
823823 // Optimizer.
824824 switch (Kind) {
825- case RISCVMachineFunctionInfo::PushKind::StdExtZcmp:
826- return RISCV::CM_POP;
827- case llvm::RISCVMachineFunctionInfo::PushKind::VendorXqccmp:
825+ case RISCVMachineFunctionInfo::PushPopKind::StdExtZcmp:
828826 return RISCV::CM_POP;
827+ case RISCVMachineFunctionInfo::PushPopKind::VendorXqccmp:
828+ return RISCV::QC_CM_POP;
829829 default :
830- llvm_unreachable (" Unhandled Push Kind " );
830+ llvm_unreachable (" Unhandled PushPopKind " );
831831 }
832832}
833833
@@ -974,8 +974,8 @@ void RISCVFrameLowering::emitPrologue(MachineFunction &MF,
974974 emitCFIForCSI<CFISaveRegisterEmitter>(MBB, MBBI, getUnmanagedCSI (MF, CSI));
975975
976976 // Generate new FP.
977- if (hasFP (MF) && RVFI->getPushKind (MF) !=
978- RISCVMachineFunctionInfo::PushKind ::VendorXqccmp) {
977+ if (hasFP (MF) && RVFI->getPushPopKind (MF) !=
978+ RISCVMachineFunctionInfo::PushPopKind ::VendorXqccmp) {
979979 if (STI.isRegisterReservedByUser (FPReg))
980980 MF.getFunction ().getContext ().diagnose (DiagnosticInfoUnsupported{
981981 MF.getFunction (), " Frame pointer required, but has been reserved." });
@@ -1863,8 +1863,8 @@ bool RISCVFrameLowering::assignCalleeSavedSpillSlots(
18631863 FixedCSRFIMap, [&](auto P) { return P.first == CS.getReg (); });
18641864 if (FII != std::end (FixedCSRFIMap)) {
18651865 int64_t Offset;
1866- if (RVFI->getPushKind (MF) ==
1867- RISCVMachineFunctionInfo::PushKind ::StdExtZcmp)
1866+ if (RVFI->getPushPopKind (MF) ==
1867+ RISCVMachineFunctionInfo::PushPopKind ::StdExtZcmp)
18681868 Offset = -((FII->second + RVFI->getRVPushRegs () + 1 ) * (int64_t )Size);
18691869 else
18701870 Offset = FII->second * (int64_t )Size;
@@ -1930,7 +1930,7 @@ bool RISCVFrameLowering::spillCalleeSavedRegisters(
19301930 // Use encoded number to represent registers to spill.
19311931 int RegEnc = RVFI->getRVPushRlist ();
19321932
1933- unsigned Opcode = getPushOpcode (RVFI->getPushKind (*MF), hasFP (*MF));
1933+ unsigned Opcode = getPushOpcode (RVFI->getPushPopKind (*MF), hasFP (*MF));
19341934 MachineInstrBuilder PushBuilder =
19351935 BuildMI (MBB, MI, DL, TII.get (Opcode))
19361936 .setMIFlag (MachineInstr::FrameSetup);
@@ -2085,7 +2085,7 @@ bool RISCVFrameLowering::restoreCalleeSavedRegisters(
20852085 if (RVFI->isPushable (*MF)) {
20862086 int RegEnc = RVFI->getRVPushRlist ();
20872087 if (RegEnc != llvm::RISCVZC::RLISTENCODE::INVALID_RLIST) {
2088- unsigned Opcode = getPopOpcode (RVFI->getPushKind (*MF));
2088+ unsigned Opcode = getPopOpcode (RVFI->getPushPopKind (*MF));
20892089 MachineInstrBuilder PopBuilder =
20902090 BuildMI (MBB, MI, DL, TII.get (Opcode))
20912091 .setMIFlag (MachineInstr::FrameDestroy);
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