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fixup! [RISCV] Xqccmp Code Generation
1 parent 03a80db commit a80217e

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3 files changed

+42
-51
lines changed

3 files changed

+42
-51
lines changed

llvm/lib/Target/RISCV/RISCVFrameLowering.cpp

Lines changed: 17 additions & 17 deletions
Original file line numberDiff line numberDiff line change
@@ -806,28 +806,28 @@ static bool isPop(unsigned Opcode) {
806806
}
807807
}
808808

809-
static unsigned getPushOpcode(RISCVMachineFunctionInfo::PushKind Kind,
810-
bool hasFP) {
809+
static unsigned getPushOpcode(RISCVMachineFunctionInfo::PushPopKind Kind,
810+
bool HasFP) {
811811
switch (Kind) {
812-
case RISCVMachineFunctionInfo::PushKind::StdExtZcmp:
812+
case RISCVMachineFunctionInfo::PushPopKind::StdExtZcmp:
813813
return RISCV::CM_PUSH;
814-
case RISCVMachineFunctionInfo::PushKind::VendorXqccmp:
815-
return hasFP ? RISCV::QC_CM_PUSHFP : RISCV::QC_CM_PUSH;
814+
case RISCVMachineFunctionInfo::PushPopKind::VendorXqccmp:
815+
return HasFP ? RISCV::QC_CM_PUSHFP : RISCV::QC_CM_PUSH;
816816
default:
817-
llvm_unreachable("Unhandled PushKind");
817+
llvm_unreachable("Unhandled PushPopKind");
818818
}
819819
}
820820

821-
static unsigned getPopOpcode(RISCVMachineFunctionInfo::PushKind Kind) {
821+
static unsigned getPopOpcode(RISCVMachineFunctionInfo::PushPopKind Kind) {
822822
// There are other pops but they are introduced later by the Push/Pop
823823
// Optimizer.
824824
switch (Kind) {
825-
case RISCVMachineFunctionInfo::PushKind::StdExtZcmp:
826-
return RISCV::CM_POP;
827-
case llvm::RISCVMachineFunctionInfo::PushKind::VendorXqccmp:
825+
case RISCVMachineFunctionInfo::PushPopKind::StdExtZcmp:
828826
return RISCV::CM_POP;
827+
case RISCVMachineFunctionInfo::PushPopKind::VendorXqccmp:
828+
return RISCV::QC_CM_POP;
829829
default:
830-
llvm_unreachable("Unhandled Push Kind");
830+
llvm_unreachable("Unhandled PushPopKind");
831831
}
832832
}
833833

@@ -974,8 +974,8 @@ void RISCVFrameLowering::emitPrologue(MachineFunction &MF,
974974
emitCFIForCSI<CFISaveRegisterEmitter>(MBB, MBBI, getUnmanagedCSI(MF, CSI));
975975

976976
// Generate new FP.
977-
if (hasFP(MF) && RVFI->getPushKind(MF) !=
978-
RISCVMachineFunctionInfo::PushKind::VendorXqccmp) {
977+
if (hasFP(MF) && RVFI->getPushPopKind(MF) !=
978+
RISCVMachineFunctionInfo::PushPopKind::VendorXqccmp) {
979979
if (STI.isRegisterReservedByUser(FPReg))
980980
MF.getFunction().getContext().diagnose(DiagnosticInfoUnsupported{
981981
MF.getFunction(), "Frame pointer required, but has been reserved."});
@@ -1863,8 +1863,8 @@ bool RISCVFrameLowering::assignCalleeSavedSpillSlots(
18631863
FixedCSRFIMap, [&](auto P) { return P.first == CS.getReg(); });
18641864
if (FII != std::end(FixedCSRFIMap)) {
18651865
int64_t Offset;
1866-
if (RVFI->getPushKind(MF) ==
1867-
RISCVMachineFunctionInfo::PushKind::StdExtZcmp)
1866+
if (RVFI->getPushPopKind(MF) ==
1867+
RISCVMachineFunctionInfo::PushPopKind::StdExtZcmp)
18681868
Offset = -((FII->second + RVFI->getRVPushRegs() + 1) * (int64_t)Size);
18691869
else
18701870
Offset = FII->second * (int64_t)Size;
@@ -1930,7 +1930,7 @@ bool RISCVFrameLowering::spillCalleeSavedRegisters(
19301930
// Use encoded number to represent registers to spill.
19311931
int RegEnc = RVFI->getRVPushRlist();
19321932

1933-
unsigned Opcode = getPushOpcode(RVFI->getPushKind(*MF), hasFP(*MF));
1933+
unsigned Opcode = getPushOpcode(RVFI->getPushPopKind(*MF), hasFP(*MF));
19341934
MachineInstrBuilder PushBuilder =
19351935
BuildMI(MBB, MI, DL, TII.get(Opcode))
19361936
.setMIFlag(MachineInstr::FrameSetup);
@@ -2085,7 +2085,7 @@ bool RISCVFrameLowering::restoreCalleeSavedRegisters(
20852085
if (RVFI->isPushable(*MF)) {
20862086
int RegEnc = RVFI->getRVPushRlist();
20872087
if (RegEnc != llvm::RISCVZC::RLISTENCODE::INVALID_RLIST) {
2088-
unsigned Opcode = getPopOpcode(RVFI->getPushKind(*MF));
2088+
unsigned Opcode = getPopOpcode(RVFI->getPushPopKind(*MF));
20892089
MachineInstrBuilder PopBuilder =
20902090
BuildMI(MBB, MI, DL, TII.get(Opcode))
20912091
.setMIFlag(MachineInstr::FrameDestroy);

llvm/lib/Target/RISCV/RISCVMachineFunctionInfo.cpp

Lines changed: 21 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -60,6 +60,27 @@ void yaml::RISCVMachineFunctionInfo::mappingImpl(yaml::IO &YamlIO) {
6060
MappingTraits<RISCVMachineFunctionInfo>::mapping(YamlIO, *this);
6161
}
6262

63+
RISCVMachineFunctionInfo::PushPopKind
64+
RISCVMachineFunctionInfo::getPushPopKind(const MachineFunction &MF) const {
65+
// We cannot use fixed locations for the callee saved spill slots if the
66+
// function uses a varargs save area.
67+
// TODO: Use a separate placement for vararg registers to enable Zcmp.
68+
if (VarArgsSaveSize != 0)
69+
return PushPopKind::None;
70+
71+
// Zcmp is not compatible with the frame pointer convention.
72+
if (MF.getSubtarget<RISCVSubtarget>().hasStdExtZcmp() &&
73+
!MF.getTarget().Options.DisableFramePointerElim(MF))
74+
return PushPopKind::StdExtZcmp;
75+
76+
// Xqccmp is Zcmp but has a push order compatible with the frame-pointer
77+
// convention.
78+
if (MF.getSubtarget<RISCVSubtarget>().hasVendorXqccmp())
79+
return PushPopKind::VendorXqccmp;
80+
81+
return PushPopKind::None;
82+
}
83+
6384
void RISCVMachineFunctionInfo::initializeBaseYamlFields(
6485
const yaml::RISCVMachineFunctionInfo &YamlMFI) {
6586
VarArgsFrameIndex = YamlMFI.VarArgsFrameIndex;

llvm/lib/Target/RISCV/RISCVMachineFunctionInfo.h

Lines changed: 4 additions & 34 deletions
Original file line numberDiff line numberDiff line change
@@ -137,42 +137,12 @@ class RISCVMachineFunctionInfo : public MachineFunctionInfo {
137137
unsigned getCalleeSavedStackSize() const { return CalleeSavedStackSize; }
138138
void setCalleeSavedStackSize(unsigned Size) { CalleeSavedStackSize = Size; }
139139

140-
bool isPushable(const MachineFunction &MF) const {
141-
// We cannot use fixed locations for the callee saved spill slots if the
142-
// function uses a varargs save area.
143-
// TODO: Use a separate placement for vararg registers to enable Zcmp.
144-
if (VarArgsSaveSize != 0)
145-
return false;
146-
147-
// Zcmp is not compatible with the frame pointer convention.
148-
if (MF.getSubtarget<RISCVSubtarget>().hasStdExtZcmp())
149-
return !MF.getTarget().Options.DisableFramePointerElim(MF);
150-
151-
// Xqccmp is Zcmp but has a push order compatible with the frame-pointer
152-
// convention.
153-
if (MF.getSubtarget<RISCVSubtarget>().hasVendorXqccmp())
154-
return true;
155-
156-
return false;
157-
}
158-
159-
enum class PushKind { None = 0, StdExtZcmp, VendorXqccmp };
160-
161-
PushKind getPushKind(const MachineFunction &MF) const {
162-
if (VarArgsSaveSize != 0)
163-
return PushKind::None;
140+
enum class PushPopKind { None = 0, StdExtZcmp, VendorXqccmp };
164141

165-
// Zcmp is not compatible with the frame pointer convention.
166-
if (MF.getSubtarget<RISCVSubtarget>().hasStdExtZcmp() &&
167-
!MF.getTarget().Options.DisableFramePointerElim(MF))
168-
return PushKind::StdExtZcmp;
142+
PushPopKind getPushPopKind(const MachineFunction &MF) const;
169143

170-
// Xqccmp is Zcmp but has a push order compatible with the frame-pointer
171-
// convention.
172-
if (MF.getSubtarget<RISCVSubtarget>().hasVendorXqccmp())
173-
return PushKind::VendorXqccmp;
174-
175-
return PushKind::None;
144+
bool isPushable(const MachineFunction &MF) const {
145+
return getPushPopKind(MF) != PushPopKind::None;
176146
}
177147

178148
int getRVPushRlist() const { return RVPushRlist; }

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