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[RISCV][MC] Support experimental extensions Zvbc32e and Zvkgs (#103709)
These two extensions add addtional instructions for carryless multiplication with 32-bits elements and Vector-Scalar GCM instructions. Please see riscv/riscv-isa-manual#1306.
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‎clang/test/Driver/print-supported-extensions-riscv.c‎

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@@ -172,6 +172,8 @@
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// CHECK-NEXT: zicfiss 1.0 'Zicfiss' (Shadow stack)
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// CHECK-NEXT: zacas 1.0 'Zacas' (Atomic Compare-And-Swap Instructions)
174174
// CHECK-NEXT: zalasr 0.1 'Zalasr' (Load-Acquire and Store-Release Instructions)
175+
// CHECK-NEXT: zvbc32e 0.7 'Zvbc32e' (Vector Carryless Multiplication with 32-bits elements)
176+
// CHECK-NEXT: zvkgs 0.7 'Zvkgs' (Vector-Scalar GCM instructions for Cryptography)
175177
// CHECK-NEXT: smmpm 1.0 'Smmpm' (Machine-level Pointer Masking for M-mode)
176178
// CHECK-NEXT: smnpm 1.0 'Smnpm' (Machine-level Pointer Masking for next lower privilege mode)
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// CHECK-NEXT: ssnpm 1.0 'Ssnpm' (Supervisor-level Pointer Masking for next lower privilege mode)

‎clang/test/Preprocessor/riscv-target-features.c‎

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@@ -187,8 +187,10 @@
187187
// CHECK-NOT: __riscv_zicfilp {{.*$}}
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// CHECK-NOT: __riscv_zicfiss {{.*$}}
189189
// CHECK-NOT: __riscv_ztso {{.*$}}
190+
// CHECK-NOT: __riscv_zvbc32e {{.*$}}
190191
// CHECK-NOT: __riscv_zvfbfmin {{.*$}}
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// CHECK-NOT: __riscv_zvfbfwma {{.*$}}
193+
// CHECK-NOT: __riscv_zvkgs {{.*$}}
192194

193195
// RUN: %clang --target=riscv32-unknown-linux-gnu \
194196
// RUN: -march=rv32ia -E -dM %s \
@@ -1658,6 +1660,14 @@
16581660
// RUN: -o - | FileCheck --check-prefix=CHECK-ZTSO-EXT %s
16591661
// CHECK-ZTSO-EXT: __riscv_ztso 1000000{{$}}
16601662

1663+
// RUN: %clang --target=riscv32 -menable-experimental-extensions \
1664+
// RUN: -march=rv32i_zve32x_zvbc32e0p7 -E -dM %s \
1665+
// RUN: -o - | FileCheck --check-prefix=CHECK-ZVBC32E-EXT %s
1666+
// RUN: %clang --target=riscv64 -menable-experimental-extensions \
1667+
// RUN: -march=rv64i_zve32x_zvbc32e0p7 -E -dM %s \
1668+
// RUN: -o - | FileCheck --check-prefix=CHECK-ZVBC32E-EXT %s
1669+
// CHECK-ZVBC32E-EXT: __riscv_zvbc32e 7000{{$}}
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16611671
// RUN: %clang --target=riscv32 -menable-experimental-extensions \
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// RUN: -march=rv32ifzvfbfmin1p0 -E -dM %s \
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// RUN: -o - | FileCheck --check-prefix=CHECK-ZVFBFMIN-EXT %s
@@ -1674,6 +1684,14 @@
16741684
// RUN: -o - | FileCheck --check-prefix=CHECK-ZVFBFWMA-EXT %s
16751685
// CHECK-ZVFBFWMA-EXT: __riscv_zvfbfwma 1000000{{$}}
16761686

1687+
// RUN: %clang --target=riscv32 -menable-experimental-extensions \
1688+
// RUN: -march=rv32i_zve32x_zvkgs0p7 -E -dM %s \
1689+
// RUN: -o - | FileCheck --check-prefix=CHECK-ZVKGS-EXT %s
1690+
// RUN: %clang --target=riscv64 -menable-experimental-extensions \
1691+
// RUN: -march=rv64i_zve32x_zvkgs0p7 -E -dM %s \
1692+
// RUN: -o - | FileCheck --check-prefix=CHECK-ZVKGS-EXT %s
1693+
// CHECK-ZVKGS-EXT: __riscv_zvkgs 7000{{$}}
1694+
16771695
// RUN: %clang -target riscv32 -menable-experimental-extensions \
16781696
// RUN: -march=rv32izicfiss1p0 -E -dM %s \
16791697
// RUN: -o - | FileCheck --check-prefix=CHECK-ZICFISS-EXT %s

‎llvm/docs/RISCVUsage.rst‎

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@@ -302,6 +302,9 @@ The primary goal of experimental support is to assist in the process of ratifica
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``experimental-zicfilp``, ``experimental-zicfiss``
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LLVM implements the `1.0 release specification <https://github.com/riscv/riscv-cfi/releases/tag/v1.0>`__.
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305+
``experimental-zvbc32e``, ``experimental-zvkgs``
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LLVM implements the `0.7 release specification <https://github.com/user-attachments/files/16450464/riscv-crypto-spec-vector-extra_v0.0.7.pdf>`__.
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To use an experimental extension from `clang`, you must add `-menable-experimental-extensions` to the command line, and specify the exact version of the experimental extension you are using. To use an experimental extension with LLVM's internal developer tools (e.g. `llc`, `llvm-objdump`, `llvm-mc`), you must prefix the extension name with `experimental-`. Note that you don't need to specify the version with internal tools, and shouldn't include the `experimental-` prefix with `clang`.
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Vendor Extensions

‎llvm/docs/ReleaseNotes.rst‎

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@@ -111,6 +111,7 @@ Changes to the RISC-V Backend
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* Fixed length vector support using RVV instructions now requires VLEN>=64. This
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means Zve32x and Zve32f will also require Zvl64b. The prior support was
113113
largely untested.
114+
* The ``Zvbc32e`` and ``Zvkgs`` extensions are now supported experimentally.
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Changes to the WebAssembly Backend
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----------------------------------

‎llvm/lib/Target/RISCV/RISCVFeatures.td‎

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@@ -754,6 +754,14 @@ def HasStdExtZvbc : Predicate<"Subtarget->hasStdExtZvbc()">,
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AssemblerPredicate<(all_of FeatureStdExtZvbc),
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"'Zvbc' (Vector Carryless Multiplication)">;
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757+
def FeatureStdExtZvbc32e
758+
: RISCVExperimentalExtension<"zvbc32e", 0, 7,
759+
"'Zvbc32e' (Vector Carryless Multiplication with 32-bits elements)">;
760+
761+
def HasStdExtZvbcOrZvbc32e : Predicate<"Subtarget->hasStdExtZvbc() || Subtarget->hasStdExtZvbc32e()">,
762+
AssemblerPredicate<(any_of FeatureStdExtZvbc, FeatureStdExtZvbc32e),
763+
"'Zvbc' or 'Zvbc32e' (Vector Carryless Multiplication)">;
764+
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def FeatureStdExtZvkg
758766
: RISCVExtension<"zvkg", 1, 0,
759767
"'Zvkg' (Vector GCM instructions for Cryptography)">,
@@ -762,6 +770,14 @@ def HasStdExtZvkg : Predicate<"Subtarget->hasStdExtZvkg()">,
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AssemblerPredicate<(all_of FeatureStdExtZvkg),
763771
"'Zvkg' (Vector GCM instructions for Cryptography)">;
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773+
def FeatureStdExtZvkgs
774+
: RISCVExperimentalExtension<"zvkgs", 0, 7,
775+
"'Zvkgs' (Vector-Scalar GCM instructions for Cryptography)",
776+
[FeatureStdExtZvkg]>;
777+
def HasStdExtZvkgs : Predicate<"Subtarget->hasStdExtZvkgs()">,
778+
AssemblerPredicate<(all_of FeatureStdExtZvkgs),
779+
"'Zvkgs' (Vector-Scalar GCM instructions for Cryptography)">;
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def FeatureStdExtZvkned
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: RISCVExtension<"zvkned", 1, 0,
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"'Zvkned' (Vector AES Encryption & Decryption (Single Round))">,

‎llvm/lib/Target/RISCV/RISCVInstrInfoZvk.td‎

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@@ -127,10 +127,10 @@ let Predicates = [HasStdExtZvbb] in {
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defm VWSLL_V : VSHT_IV_V_X_I<"vwsll", 0b110101>;
128128
} // Predicates = [HasStdExtZvbb]
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130-
let Predicates = [HasStdExtZvbc] in {
130+
let Predicates = [HasStdExtZvbcOrZvbc32e] in {
131131
defm VCLMUL_V : VCLMUL_MV_V_X<"vclmul", 0b001100>;
132132
defm VCLMULH_V : VCLMUL_MV_V_X<"vclmulh", 0b001101>;
133-
} // Predicates = [HasStdExtZvbc]
133+
} // Predicates = [HasStdExtZvbcOrZvbc32e]
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135135
let Predicates = [HasStdExtZvkb] in {
136136
defm VANDN_V : VALU_IV_V_X<"vandn", 0b000001>;
@@ -150,6 +150,14 @@ let Predicates = [HasStdExtZvkg], RVVConstraint = NoConstraint in {
150150
SchedBinaryMC<"WriteVGMULV", "ReadVGMULV", "ReadVGMULV">;
151151
} // Predicates = [HasStdExtZvkg]
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153+
let Predicates = [HasStdExtZvkgs], RVVConstraint = VS2Constraint in {
154+
def VGHSH_VS : PALUVVNoVmTernary<0b100011, OPMVV, "vghsh.vs">,
155+
SchedTernaryMC<"WriteVGHSHV", "ReadVGHSHV", "ReadVGHSHV",
156+
"ReadVGHSHV">;
157+
def VGMUL_VS : PALUVs2NoVmBinary<0b101001, 0b10001, OPMVV, "vgmul.vs">,
158+
SchedBinaryMC<"WriteVGMULV", "ReadVGMULV", "ReadVGMULV">;
159+
} // Predicates = [HasStdExtZvkgs]
160+
153161
let Predicates = [HasStdExtZvknhaOrZvknhb], RVVConstraint = Sha2Constraint in {
154162
def VSHA2CH_VV : PALUVVNoVmTernary<0b101110, OPMVV, "vsha2ch.vv">,
155163
SchedTernaryMC<"WriteVSHA2CHV", "ReadVSHA2CHV", "ReadVSHA2CHV",

‎llvm/lib/TargetParser/RISCVISAInfo.cpp‎

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@@ -750,8 +750,13 @@ Error RISCVISAInfo::checkDependency() {
750750
return getError(
751751
"'zvbc' requires 'v' or 'zve64*' extension to also be specified");
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753-
if ((Exts.count("zvkb") || Exts.count("zvkg") || Exts.count("zvkned") ||
754-
Exts.count("zvknha") || Exts.count("zvksed") || Exts.count("zvksh")) &&
753+
if (Exts.count("zvbc32e") && !Exts.count("zve32x"))
754+
return getError(
755+
"'zvbc32e' requires 'v' or 'zve*' extension to also be specified");
756+
757+
if ((Exts.count("zvkb") || Exts.count("zvkg") || Exts.count("zvkgs") ||
758+
Exts.count("zvkned") || Exts.count("zvknha") || Exts.count("zvksed") ||
759+
Exts.count("zvksh")) &&
755760
!HasVector)
756761
return getError(
757762
"'zvk*' requires 'v' or 'zve*' extension to also be specified");

‎llvm/test/CodeGen/RISCV/attributes.ll‎

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@@ -125,6 +125,8 @@
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; RUN: llc -mtriple=riscv32 -mattr=+zama16b %s -o - | FileCheck --check-prefixes=CHECK,RV32ZAMA16B %s
126126
; RUN: llc -mtriple=riscv32 -mattr=+experimental-zicfilp %s -o - | FileCheck --check-prefix=RV32ZICFILP %s
127127
; RUN: llc -mtriple=riscv32 -mattr=+a,+zabha %s -o - | FileCheck --check-prefix=RV32ZABHA %s
128+
; RUN: llc -mtriple=riscv32 -mattr=+zve32x -mattr=+experimental-zvbc32e %s -o - | FileCheck --check-prefix=RV32ZVBC32E %s
129+
; RUN: llc -mtriple=riscv32 -mattr=+zve32x -mattr=+experimental-zvkgs %s -o - | FileCheck --check-prefix=RV32ZVKGS %s
128130
; RUN: llc -mtriple=riscv32 -mattr=+experimental-ssnpm %s -o - | FileCheck --check-prefix=RV32SSNPM %s
129131
; RUN: llc -mtriple=riscv32 -mattr=+experimental-smnpm %s -o - | FileCheck --check-prefix=RV32SMNPM %s
130132
; RUN: llc -mtriple=riscv32 -mattr=+experimental-smmpm %s -o - | FileCheck --check-prefix=RV32SMMPM %s
@@ -263,6 +265,8 @@
263265
; RUN: llc -mtriple=riscv64 -mattr=+experimental-zalasr %s -o - | FileCheck --check-prefix=RV64ZALASR %s
264266
; RUN: llc -mtriple=riscv64 -mattr=+experimental-zicfilp %s -o - | FileCheck --check-prefix=RV64ZICFILP %s
265267
; RUN: llc -mtriple=riscv64 -mattr=+a,+zabha %s -o - | FileCheck --check-prefix=RV64ZABHA %s
268+
; RUN: llc -mtriple=riscv64 -mattr=+zve32x -mattr=+experimental-zvbc32e %s -o - | FileCheck --check-prefix=RV64ZVBC32E %s
269+
; RUN: llc -mtriple=riscv64 -mattr=+zve32x -mattr=+experimental-zvkgs %s -o - | FileCheck --check-prefix=RV64ZVKGS %s
266270
; RUN: llc -mtriple=riscv64 -mattr=+experimental-ssnpm %s -o - | FileCheck --check-prefix=RV64SSNPM %s
267271
; RUN: llc -mtriple=riscv64 -mattr=+experimental-smnpm %s -o - | FileCheck --check-prefix=RV64SMNPM %s
268272
; RUN: llc -mtriple=riscv64 -mattr=+experimental-smmpm %s -o - | FileCheck --check-prefix=RV64SMMPM %s
@@ -409,6 +413,8 @@
409413
; RV32ZAMA16B: .attribute 5, "rv32i2p1_zama16b1p0"
410414
; RV32ZICFILP: .attribute 5, "rv32i2p1_zicfilp1p0_zicsr2p0"
411415
; RV32ZABHA: .attribute 5, "rv32i2p1_a2p1_zabha1p0"
416+
; RV32ZVBC32E: .attribute 5, "rv32i2p1_zicsr2p0_zvbc32e0p7_zve32x1p0_zvl32b1p0"
417+
; RV32ZVKGS: .attribute 5, "rv32i2p1_zicsr2p0_zve32x1p0_zvkg1p0_zvkgs0p7_zvl32b1p0"
412418
; RV32SSNPM: .attribute 5, "rv32i2p1_ssnpm1p0"
413419
; RV32SMNPM: .attribute 5, "rv32i2p1_smnpm1p0"
414420
; RV32SMMPM: .attribute 5, "rv32i2p1_smmpm1p0"
@@ -545,6 +551,8 @@
545551
; RV64ZALASR: .attribute 5, "rv64i2p1_zalasr0p1"
546552
; RV64ZICFILP: .attribute 5, "rv64i2p1_zicfilp1p0_zicsr2p0"
547553
; RV64ZABHA: .attribute 5, "rv64i2p1_a2p1_zabha1p0"
554+
; RV64ZVBC32E: .attribute 5, "rv64i2p1_zicsr2p0_zvbc32e0p7_zve32x1p0_zvl32b1p0"
555+
; RV64ZVKGS: .attribute 5, "rv64i2p1_zicsr2p0_zve32x1p0_zvkg1p0_zvkgs0p7_zvl32b1p0"
548556
; RV64SSNPM: .attribute 5, "rv64i2p1_ssnpm1p0"
549557
; RV64SMNPM: .attribute 5, "rv64i2p1_smnpm1p0"
550558
; RV64SMMPM: .attribute 5, "rv64i2p1_smmpm1p0"

‎llvm/test/MC/RISCV/rvv/zvbc.s‎

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Original file line numberDiff line numberDiff line change
@@ -7,27 +7,36 @@
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# RUN: | FileCheck %s --check-prefix=CHECK-INST
88
# RUN: llvm-mc -triple=riscv32 -filetype=obj --mattr=+zve64x --mattr=+zvbc %s \
99
# RUN: | llvm-objdump -d - | FileCheck %s --check-prefix=CHECK-UNKNOWN
10+
# RUN: llvm-mc -triple=riscv32 -show-encoding --mattr=+zve32x --mattr=+experimental-zvbc32e %s \
11+
# RUN: | FileCheck %s --check-prefixes=CHECK-ENCODING,CHECK-INST
12+
# RUN: not llvm-mc -triple=riscv32 -show-encoding %s 2>&1 \
13+
# RUN: | FileCheck %s --check-prefix=CHECK-ERROR
14+
# RUN: llvm-mc -triple=riscv32 -filetype=obj --mattr=+zve32x --mattr=+experimental-zvbc32e %s \
15+
# RUN: | llvm-objdump -d --mattr=+zve32x --mattr=+experimental-zvbc32e - \
16+
# RUN: | FileCheck %s --check-prefix=CHECK-INST
17+
# RUN: llvm-mc -triple=riscv32 -filetype=obj --mattr=+zve32x --mattr=+experimental-zvbc32e %s \
18+
# RUN: | llvm-objdump -d - | FileCheck %s --check-prefix=CHECK-UNKNOWN
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1120
vclmul.vv v10, v9, v8
1221
# CHECK-INST: vclmul.vv v10, v9, v8
1322
# CHECK-ENCODING: [0x57,0x25,0x94,0x32]
14-
# CHECK-ERROR: instruction requires the following: 'Zvbc' (Vector Carryless Multiplication){{$}}
23+
# CHECK-ERROR: instruction requires the following: 'Zvbc' or 'Zvbc32e' (Vector Carryless Multiplication){{$}}
1524
# CHECK-UNKNOWN: 32942557 <unknown>
1625

1726
vclmul.vx v10, v9, a0
1827
# CHECK-INST: vclmul.vx v10, v9, a0
1928
# CHECK-ENCODING: [0x57,0x65,0x95,0x32]
20-
# CHECK-ERROR: instruction requires the following: 'Zvbc' (Vector Carryless Multiplication){{$}}
29+
# CHECK-ERROR: instruction requires the following: 'Zvbc' or 'Zvbc32e' (Vector Carryless Multiplication){{$}}
2130
# CHECK-UNKNOWN: 32956557 <unknown>
2231

2332
vclmulh.vv v10, v9, v8
2433
# CHECK-INST: vclmulh.vv v10, v9, v8
2534
# CHECK-ENCODING: [0x57,0x25,0x94,0x36]
26-
# CHECK-ERROR: instruction requires the following: 'Zvbc' (Vector Carryless Multiplication){{$}}
35+
# CHECK-ERROR: instruction requires the following: 'Zvbc' or 'Zvbc32e' (Vector Carryless Multiplication){{$}}
2736
# CHECK-UNKNOWN: 36942557 <unknown>
2837

2938
vclmulh.vx v10, v9, a0
3039
# CHECK-INST: vclmulh.vx v10, v9, a0
3140
# CHECK-ENCODING: [0x57,0x65,0x95,0x36]
32-
# CHECK-ERROR: instruction requires the following: 'Zvbc' (Vector Carryless Multiplication){{$}}
41+
# CHECK-ERROR: instruction requires the following: 'Zvbc' or 'Zvbc32e' (Vector Carryless Multiplication){{$}}
3342
# CHECK-UNKNOWN: 36956557 <unknown>

‎llvm/test/MC/RISCV/rvv/zvkgs.s‎

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Original file line numberDiff line numberDiff line change
@@ -0,0 +1,21 @@
1+
# RUN: llvm-mc -triple=riscv32 -show-encoding --mattr=+zve32x --mattr=+experimental-zvkgs %s \
2+
# RUN: | FileCheck %s --check-prefixes=CHECK-ENCODING,CHECK-INST
3+
# RUN: not llvm-mc -triple=riscv32 -show-encoding %s 2>&1 \
4+
# RUN: | FileCheck %s --check-prefix=CHECK-ERROR
5+
# RUN: llvm-mc -triple=riscv32 -filetype=obj --mattr=+zve32x --mattr=+experimental-zvkgs %s \
6+
# RUN: | llvm-objdump -d --mattr=+zve32x --mattr=+experimental-zvkgs - \
7+
# RUN: | FileCheck %s --check-prefix=CHECK-INST
8+
# RUN: llvm-mc -triple=riscv32 -filetype=obj --mattr=+zve32x --mattr=+experimental-zvkgs %s \
9+
# RUN: | llvm-objdump -d - | FileCheck %s --check-prefix=CHECK-UNKNOWN
10+
11+
vghsh.vs v10, v9, v8
12+
# CHECK-INST: vghsh.vs v10, v9, v8
13+
# CHECK-ENCODING: [0x77,0x25,0x94,0x8e]
14+
# CHECK-ERROR: instruction requires the following: 'Zvkgs' (Vector-Scalar GCM instructions for Cryptography){{$}}
15+
# CHECK-UNKNOWN: 8e942577 <unknown>
16+
17+
vgmul.vs v10, v9
18+
# CHECK-INST: vgmul.vs v10, v9
19+
# CHECK-ENCODING: [0x77,0xa5,0x98,0xa6]
20+
# CHECK-ERROR: instruction requires the following: 'Zvkgs' (Vector-Scalar GCM instructions for Cryptography){{$}}
21+
# CHECK-UNKNOWN: a698a577 <unknown>

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