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Enable FWD_PROGRESS bit for GFX10+.
1 parent 9e8d11d commit a9c7b8c

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14 files changed

+63
-54
lines changed

14 files changed

+63
-54
lines changed

llvm/lib/Target/AMDGPU/AMDGPUAsmPrinter.cpp

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -1196,6 +1196,7 @@ void AMDGPUAsmPrinter::getSIProgramInfo(SIProgramInfo &ProgInfo,
11961196
if (getIsaVersion(getGlobalSTI()->getCPU()).Major >= 10) {
11971197
ProgInfo.WgpMode = STM.isCuModeEnabled() ? 0 : 1;
11981198
ProgInfo.MemOrdered = 1;
1199+
ProgInfo.FwdProgress = 1;
11991200
}
12001201

12011202
// 0 = X, 1 = XY, 2 = XYZ

llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUMCKernelDescriptor.cpp

Lines changed: 5 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -70,6 +70,11 @@ MCKernelDescriptor::getDefaultAmdhsaKernelDescriptor(const MCSubtargetInfo *STI,
7070
KD.compute_pgm_rsrc1, OneMCExpr,
7171
amdhsa::COMPUTE_PGM_RSRC1_GFX10_PLUS_MEM_ORDERED_SHIFT,
7272
amdhsa::COMPUTE_PGM_RSRC1_GFX10_PLUS_MEM_ORDERED, Ctx);
73+
74+
MCKernelDescriptor::bits_set(
75+
KD.compute_pgm_rsrc1, OneMCExpr,
76+
amdhsa::COMPUTE_PGM_RSRC1_GFX10_PLUS_FWD_PROGRESS_SHIFT,
77+
amdhsa::COMPUTE_PGM_RSRC1_GFX10_PLUS_FWD_PROGRESS, Ctx);
7378
}
7479
if (AMDGPU::isGFX90A(*STI) && STI->getFeatureBits().test(FeatureTgSplit))
7580
MCKernelDescriptor::bits_set(

llvm/lib/Target/AMDGPU/SIProgramInfo.cpp

Lines changed: 3 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -39,6 +39,7 @@ void SIProgramInfo::reset(const MachineFunction &MF) {
3939
IEEEMode = 0;
4040
WgpMode = 0;
4141
MemOrdered = 0;
42+
FwdProgress = 0;
4243
RrWgMode = 0;
4344
ScratchSize = ZeroExpr;
4445

@@ -84,7 +85,8 @@ static uint64_t getComputePGMRSrc1Reg(const SIProgramInfo &ProgInfo,
8485
S_00B848_PRIV(ProgInfo.Priv) |
8586
S_00B848_DEBUG_MODE(ProgInfo.DebugMode) |
8687
S_00B848_WGP_MODE(ProgInfo.WgpMode) |
87-
S_00B848_MEM_ORDERED(ProgInfo.MemOrdered);
88+
S_00B848_MEM_ORDERED(ProgInfo.MemOrdered) |
89+
S_00B848_FWD_PROGRESS(ProgInfo.FwdProgress);
8890

8991
if (ST.hasDX10ClampMode())
9092
Reg |= S_00B848_DX10_CLAMP(ProgInfo.DX10Clamp);

llvm/lib/Target/AMDGPU/SIProgramInfo.h

Lines changed: 4 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -41,9 +41,10 @@ struct LLVM_EXTERNAL_VISIBILITY SIProgramInfo {
4141
uint32_t DX10Clamp = 0;
4242
uint32_t DebugMode = 0;
4343
uint32_t IEEEMode = 0;
44-
uint32_t WgpMode = 0; // GFX10+
45-
uint32_t MemOrdered = 0; // GFX10+
46-
uint32_t RrWgMode = 0; // GFX12+
44+
uint32_t WgpMode = 0; // GFX10+
45+
uint32_t MemOrdered = 0; // GFX10+
46+
uint32_t FwdProgress = 0; // GFX10+
47+
uint32_t RrWgMode = 0; // GFX12+
4748
const MCExpr *ScratchSize = nullptr;
4849

4950
// State used to calculate fields set in PGM_RSRC2 pm4 packet.

llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -1319,7 +1319,7 @@ void initDefaultAMDKernelCodeT(AMDGPUMCKernelCodeT &KernelCode,
13191319
if (Version.Major >= 10) {
13201320
KernelCode.compute_pgm_resource_registers |=
13211321
S_00B848_WGP_MODE(STI->getFeatureBits().test(FeatureCuMode) ? 0 : 1) |
1322-
S_00B848_MEM_ORDERED(1);
1322+
S_00B848_MEM_ORDERED(1) | S_00B848_FWD_PROGRESS(1);
13231323
}
13241324
}
13251325

llvm/test/CodeGen/AMDGPU/GlobalISel/extractelement.ll

Lines changed: 6 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -3208,7 +3208,7 @@ define amdgpu_kernel void @dyn_extract_v5f64_s_s(ptr addrspace(1) %out, i32 %sel
32083208
; GFX10-NEXT: enable_ieee_mode = 1
32093209
; GFX10-NEXT: enable_wgp_mode = 1
32103210
; GFX10-NEXT: enable_mem_ordered = 1
3211-
; GFX10-NEXT: enable_fwd_progress = 0
3211+
; GFX10-NEXT: enable_fwd_progress = 1
32123212
; GFX10-NEXT: enable_sgpr_private_segment_wave_byte_offset = 0
32133213
; GFX10-NEXT: user_sgpr_count = 12
32143214
; GFX10-NEXT: enable_trap_handler = 0
@@ -3300,7 +3300,7 @@ define amdgpu_kernel void @dyn_extract_v5f64_s_s(ptr addrspace(1) %out, i32 %sel
33003300
; GFX11-NEXT: enable_ieee_mode = 1
33013301
; GFX11-NEXT: enable_wgp_mode = 1
33023302
; GFX11-NEXT: enable_mem_ordered = 1
3303-
; GFX11-NEXT: enable_fwd_progress = 0
3303+
; GFX11-NEXT: enable_fwd_progress = 1
33043304
; GFX11-NEXT: enable_sgpr_private_segment_wave_byte_offset = 0
33053305
; GFX11-NEXT: user_sgpr_count = 13
33063306
; GFX11-NEXT: enable_trap_handler = 0
@@ -4209,7 +4209,7 @@ define amdgpu_kernel void @dyn_extract_v4f32_s_s_s(ptr addrspace(1) %out, i32 %s
42094209
; GFX10-NEXT: enable_ieee_mode = 1
42104210
; GFX10-NEXT: enable_wgp_mode = 1
42114211
; GFX10-NEXT: enable_mem_ordered = 1
4212-
; GFX10-NEXT: enable_fwd_progress = 0
4212+
; GFX10-NEXT: enable_fwd_progress = 1
42134213
; GFX10-NEXT: enable_sgpr_private_segment_wave_byte_offset = 0
42144214
; GFX10-NEXT: user_sgpr_count = 12
42154215
; GFX10-NEXT: enable_trap_handler = 0
@@ -4294,7 +4294,7 @@ define amdgpu_kernel void @dyn_extract_v4f32_s_s_s(ptr addrspace(1) %out, i32 %s
42944294
; GFX11-NEXT: enable_ieee_mode = 1
42954295
; GFX11-NEXT: enable_wgp_mode = 1
42964296
; GFX11-NEXT: enable_mem_ordered = 1
4297-
; GFX11-NEXT: enable_fwd_progress = 0
4297+
; GFX11-NEXT: enable_fwd_progress = 1
42984298
; GFX11-NEXT: enable_sgpr_private_segment_wave_byte_offset = 0
42994299
; GFX11-NEXT: user_sgpr_count = 13
43004300
; GFX11-NEXT: enable_trap_handler = 0
@@ -4560,7 +4560,7 @@ define amdgpu_kernel void @dyn_extract_v4f64_s_s_s(ptr addrspace(1) %out, i32 %s
45604560
; GFX10-NEXT: enable_ieee_mode = 1
45614561
; GFX10-NEXT: enable_wgp_mode = 1
45624562
; GFX10-NEXT: enable_mem_ordered = 1
4563-
; GFX10-NEXT: enable_fwd_progress = 0
4563+
; GFX10-NEXT: enable_fwd_progress = 1
45644564
; GFX10-NEXT: enable_sgpr_private_segment_wave_byte_offset = 0
45654565
; GFX10-NEXT: user_sgpr_count = 12
45664566
; GFX10-NEXT: enable_trap_handler = 0
@@ -4648,7 +4648,7 @@ define amdgpu_kernel void @dyn_extract_v4f64_s_s_s(ptr addrspace(1) %out, i32 %s
46484648
; GFX11-NEXT: enable_ieee_mode = 1
46494649
; GFX11-NEXT: enable_wgp_mode = 1
46504650
; GFX11-NEXT: enable_mem_ordered = 1
4651-
; GFX11-NEXT: enable_fwd_progress = 0
4651+
; GFX11-NEXT: enable_fwd_progress = 1
46524652
; GFX11-NEXT: enable_sgpr_private_segment_wave_byte_offset = 0
46534653
; GFX11-NEXT: user_sgpr_count = 13
46544654
; GFX11-NEXT: enable_trap_handler = 0

llvm/test/CodeGen/AMDGPU/amdpal-msgpack-ieee.ll

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -7,7 +7,7 @@
77
; SI-DAG: '0x2e12 (COMPUTE_PGM_RSRC1)': 0xaf0000{{$}}
88
; VI-DAG: '0x2e12 (COMPUTE_PGM_RSRC1)': 0xaf02c0{{$}}
99
; GFX9-DAG: '0x2e12 (COMPUTE_PGM_RSRC1)': 0xaf0000{{$}}
10-
; GFX12-DAG: '0x2e12 (COMPUTE_PGM_RSRC1)': 0x600f0000{{$}}
10+
; GFX12-DAG: '0x2e12 (COMPUTE_PGM_RSRC1)': 0xe00f0000{{$}}
1111
define amdgpu_cs half @cs_amdpal(half %arg0) #0 {
1212
%add = fadd half %arg0, 1.0
1313
ret half %add

llvm/test/MC/AMDGPU/hsa-gfx12-v4.s

Lines changed: 3 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -29,7 +29,7 @@
2929
// OBJDUMP-NEXT: 0000 00000000 00000000 00000000 00000000
3030
// OBJDUMP-NEXT: 0010 00000000 00000000 00000000 00000000
3131
// OBJDUMP-NEXT: 0020 00000000 00000000 00000000 00000000
32-
// OBJDUMP-NEXT: 0030 00000c60 80000000 00040000 00000000
32+
// OBJDUMP-NEXT: 0030 00000ce0 80000000 00040000 00000000
3333
// complete
3434
// OBJDUMP-NEXT: 0040 01000000 01000000 08000000 00000000
3535
// OBJDUMP-NEXT: 0050 00000000 00000000 00000000 00000000
@@ -39,12 +39,12 @@
3939
// OBJDUMP-NEXT: 0080 00000000 00000000 00000000 00000000
4040
// OBJDUMP-NEXT: 0090 00000000 00000000 00000000 00000000
4141
// OBJDUMP-NEXT: 00a0 00000000 00000000 00000000 00000000
42-
// OBJDUMP-NEXT: 00b0 00000060 80000000 00040000 00000000
42+
// OBJDUMP-NEXT: 00b0 000000e0 80000000 00040000 00000000
4343
// disabled_user_sgpr
4444
// OBJDUMP-NEXT: 00c0 00000000 00000000 00000000 00000000
4545
// OBJDUMP-NEXT: 00d0 00000000 00000000 00000000 00000000
4646
// OBJDUMP-NEXT: 00e0 00000000 00000000 00000000 00000000
47-
// OBJDUMP-NEXT: 00f0 00000c60 80000000 00040000 00000000
47+
// OBJDUMP-NEXT: 00f0 00000ce0 80000000 00040000 00000000
4848

4949
.text
5050

llvm/test/MC/AMDGPU/hsa-sym-exprs-gfx10.s

Lines changed: 10 additions & 10 deletions
Original file line numberDiff line numberDiff line change
@@ -126,16 +126,16 @@ expr_defined:
126126
// ASM-NEXT: .amdhsa_reserve_vcc defined_boolean
127127
// ASM-NEXT: .amdhsa_reserve_flat_scratch defined_boolean
128128
// ASM-NEXT: .amdhsa_reserve_xnack_mask 1
129-
// ASM-NEXT: .amdhsa_float_round_mode_32 (((((((((((((((((((1621884928|(defined_2_bits<<12))&(~49152))|(defined_2_bits<<14))&(~196608))|(defined_2_bits<<16))&(~786432))|(defined_2_bits<<18))&(~67108864))|(defined_boolean<<26))&(~536870912))|(defined_boolean<<29))&(~1073741824))|(defined_boolean<<30))&(~2147483648))|(defined_boolean<<31))&(~63))|(((alignto(max(defined_value+4, 1), 8))/8)-1))&(~960))&12288)>>12
130-
// ASM-NEXT: .amdhsa_float_round_mode_16_64 (((((((((((((((((((1621884928|(defined_2_bits<<12))&(~49152))|(defined_2_bits<<14))&(~196608))|(defined_2_bits<<16))&(~786432))|(defined_2_bits<<18))&(~67108864))|(defined_boolean<<26))&(~536870912))|(defined_boolean<<29))&(~1073741824))|(defined_boolean<<30))&(~2147483648))|(defined_boolean<<31))&(~63))|(((alignto(max(defined_value+4, 1), 8))/8)-1))&(~960))&49152)>>14
131-
// ASM-NEXT: .amdhsa_float_denorm_mode_32 (((((((((((((((((((1621884928|(defined_2_bits<<12))&(~49152))|(defined_2_bits<<14))&(~196608))|(defined_2_bits<<16))&(~786432))|(defined_2_bits<<18))&(~67108864))|(defined_boolean<<26))&(~536870912))|(defined_boolean<<29))&(~1073741824))|(defined_boolean<<30))&(~2147483648))|(defined_boolean<<31))&(~63))|(((alignto(max(defined_value+4, 1), 8))/8)-1))&(~960))&196608)>>16
132-
// ASM-NEXT: .amdhsa_float_denorm_mode_16_64 (((((((((((((((((((1621884928|(defined_2_bits<<12))&(~49152))|(defined_2_bits<<14))&(~196608))|(defined_2_bits<<16))&(~786432))|(defined_2_bits<<18))&(~67108864))|(defined_boolean<<26))&(~536870912))|(defined_boolean<<29))&(~1073741824))|(defined_boolean<<30))&(~2147483648))|(defined_boolean<<31))&(~63))|(((alignto(max(defined_value+4, 1), 8))/8)-1))&(~960))&786432)>>18
133-
// ASM-NEXT: .amdhsa_dx10_clamp (((((((((((((((((((1621884928|(defined_2_bits<<12))&(~49152))|(defined_2_bits<<14))&(~196608))|(defined_2_bits<<16))&(~786432))|(defined_2_bits<<18))&(~67108864))|(defined_boolean<<26))&(~536870912))|(defined_boolean<<29))&(~1073741824))|(defined_boolean<<30))&(~2147483648))|(defined_boolean<<31))&(~63))|(((alignto(max(defined_value+4, 1), 8))/8)-1))&(~960))&2097152)>>21
134-
// ASM-NEXT: .amdhsa_ieee_mode (((((((((((((((((((1621884928|(defined_2_bits<<12))&(~49152))|(defined_2_bits<<14))&(~196608))|(defined_2_bits<<16))&(~786432))|(defined_2_bits<<18))&(~67108864))|(defined_boolean<<26))&(~536870912))|(defined_boolean<<29))&(~1073741824))|(defined_boolean<<30))&(~2147483648))|(defined_boolean<<31))&(~63))|(((alignto(max(defined_value+4, 1), 8))/8)-1))&(~960))&8388608)>>23
135-
// ASM-NEXT: .amdhsa_fp16_overflow (((((((((((((((((((1621884928|(defined_2_bits<<12))&(~49152))|(defined_2_bits<<14))&(~196608))|(defined_2_bits<<16))&(~786432))|(defined_2_bits<<18))&(~67108864))|(defined_boolean<<26))&(~536870912))|(defined_boolean<<29))&(~1073741824))|(defined_boolean<<30))&(~2147483648))|(defined_boolean<<31))&(~63))|(((alignto(max(defined_value+4, 1), 8))/8)-1))&(~960))&67108864)>>26
136-
// ASM-NEXT: .amdhsa_workgroup_processor_mode (((((((((((((((((((1621884928|(defined_2_bits<<12))&(~49152))|(defined_2_bits<<14))&(~196608))|(defined_2_bits<<16))&(~786432))|(defined_2_bits<<18))&(~67108864))|(defined_boolean<<26))&(~536870912))|(defined_boolean<<29))&(~1073741824))|(defined_boolean<<30))&(~2147483648))|(defined_boolean<<31))&(~63))|(((alignto(max(defined_value+4, 1), 8))/8)-1))&(~960))&536870912)>>29
137-
// ASM-NEXT: .amdhsa_memory_ordered (((((((((((((((((((1621884928|(defined_2_bits<<12))&(~49152))|(defined_2_bits<<14))&(~196608))|(defined_2_bits<<16))&(~786432))|(defined_2_bits<<18))&(~67108864))|(defined_boolean<<26))&(~536870912))|(defined_boolean<<29))&(~1073741824))|(defined_boolean<<30))&(~2147483648))|(defined_boolean<<31))&(~63))|(((alignto(max(defined_value+4, 1), 8))/8)-1))&(~960))&1073741824)>>30
138-
// ASM-NEXT: .amdhsa_forward_progress (((((((((((((((((((1621884928|(defined_2_bits<<12))&(~49152))|(defined_2_bits<<14))&(~196608))|(defined_2_bits<<16))&(~786432))|(defined_2_bits<<18))&(~67108864))|(defined_boolean<<26))&(~536870912))|(defined_boolean<<29))&(~1073741824))|(defined_boolean<<30))&(~2147483648))|(defined_boolean<<31))&(~63))|(((alignto(max(defined_value+4, 1), 8))/8)-1))&(~960))&2147483648)>>31
129+
// ASM-NEXT: .amdhsa_float_round_mode_32 (((((((((((((((((((3769368576|(defined_2_bits<<12))&(~49152))|(defined_2_bits<<14))&(~196608))|(defined_2_bits<<16))&(~786432))|(defined_2_bits<<18))&(~67108864))|(defined_boolean<<26))&(~536870912))|(defined_boolean<<29))&(~1073741824))|(defined_boolean<<30))&(~2147483648))|(defined_boolean<<31))&(~63))|(((alignto(max(defined_value+4, 1), 8))/8)-1))&(~960))&12288)>>12
130+
// ASM-NEXT: .amdhsa_float_round_mode_16_64 (((((((((((((((((((3769368576|(defined_2_bits<<12))&(~49152))|(defined_2_bits<<14))&(~196608))|(defined_2_bits<<16))&(~786432))|(defined_2_bits<<18))&(~67108864))|(defined_boolean<<26))&(~536870912))|(defined_boolean<<29))&(~1073741824))|(defined_boolean<<30))&(~2147483648))|(defined_boolean<<31))&(~63))|(((alignto(max(defined_value+4, 1), 8))/8)-1))&(~960))&49152)>>14
131+
// ASM-NEXT: .amdhsa_float_denorm_mode_32 (((((((((((((((((((3769368576|(defined_2_bits<<12))&(~49152))|(defined_2_bits<<14))&(~196608))|(defined_2_bits<<16))&(~786432))|(defined_2_bits<<18))&(~67108864))|(defined_boolean<<26))&(~536870912))|(defined_boolean<<29))&(~1073741824))|(defined_boolean<<30))&(~2147483648))|(defined_boolean<<31))&(~63))|(((alignto(max(defined_value+4, 1), 8))/8)-1))&(~960))&196608)>>16
132+
// ASM-NEXT: .amdhsa_float_denorm_mode_16_64 (((((((((((((((((((3769368576|(defined_2_bits<<12))&(~49152))|(defined_2_bits<<14))&(~196608))|(defined_2_bits<<16))&(~786432))|(defined_2_bits<<18))&(~67108864))|(defined_boolean<<26))&(~536870912))|(defined_boolean<<29))&(~1073741824))|(defined_boolean<<30))&(~2147483648))|(defined_boolean<<31))&(~63))|(((alignto(max(defined_value+4, 1), 8))/8)-1))&(~960))&786432)>>18
133+
// ASM-NEXT: .amdhsa_dx10_clamp (((((((((((((((((((3769368576|(defined_2_bits<<12))&(~49152))|(defined_2_bits<<14))&(~196608))|(defined_2_bits<<16))&(~786432))|(defined_2_bits<<18))&(~67108864))|(defined_boolean<<26))&(~536870912))|(defined_boolean<<29))&(~1073741824))|(defined_boolean<<30))&(~2147483648))|(defined_boolean<<31))&(~63))|(((alignto(max(defined_value+4, 1), 8))/8)-1))&(~960))&2097152)>>21
134+
// ASM-NEXT: .amdhsa_ieee_mode (((((((((((((((((((3769368576|(defined_2_bits<<12))&(~49152))|(defined_2_bits<<14))&(~196608))|(defined_2_bits<<16))&(~786432))|(defined_2_bits<<18))&(~67108864))|(defined_boolean<<26))&(~536870912))|(defined_boolean<<29))&(~1073741824))|(defined_boolean<<30))&(~2147483648))|(defined_boolean<<31))&(~63))|(((alignto(max(defined_value+4, 1), 8))/8)-1))&(~960))&8388608)>>23
135+
// ASM-NEXT: .amdhsa_fp16_overflow (((((((((((((((((((3769368576|(defined_2_bits<<12))&(~49152))|(defined_2_bits<<14))&(~196608))|(defined_2_bits<<16))&(~786432))|(defined_2_bits<<18))&(~67108864))|(defined_boolean<<26))&(~536870912))|(defined_boolean<<29))&(~1073741824))|(defined_boolean<<30))&(~2147483648))|(defined_boolean<<31))&(~63))|(((alignto(max(defined_value+4, 1), 8))/8)-1))&(~960))&67108864)>>26
136+
// ASM-NEXT: .amdhsa_workgroup_processor_mode (((((((((((((((((((3769368576|(defined_2_bits<<12))&(~49152))|(defined_2_bits<<14))&(~196608))|(defined_2_bits<<16))&(~786432))|(defined_2_bits<<18))&(~67108864))|(defined_boolean<<26))&(~536870912))|(defined_boolean<<29))&(~1073741824))|(defined_boolean<<30))&(~2147483648))|(defined_boolean<<31))&(~63))|(((alignto(max(defined_value+4, 1), 8))/8)-1))&(~960))&536870912)>>29
137+
// ASM-NEXT: .amdhsa_memory_ordered (((((((((((((((((((3769368576|(defined_2_bits<<12))&(~49152))|(defined_2_bits<<14))&(~196608))|(defined_2_bits<<16))&(~786432))|(defined_2_bits<<18))&(~67108864))|(defined_boolean<<26))&(~536870912))|(defined_boolean<<29))&(~1073741824))|(defined_boolean<<30))&(~2147483648))|(defined_boolean<<31))&(~63))|(((alignto(max(defined_value+4, 1), 8))/8)-1))&(~960))&1073741824)>>30
138+
// ASM-NEXT: .amdhsa_forward_progress (((((((((((((((((((3769368576|(defined_2_bits<<12))&(~49152))|(defined_2_bits<<14))&(~196608))|(defined_2_bits<<16))&(~786432))|(defined_2_bits<<18))&(~67108864))|(defined_boolean<<26))&(~536870912))|(defined_boolean<<29))&(~1073741824))|(defined_boolean<<30))&(~2147483648))|(defined_boolean<<31))&(~63))|(((alignto(max(defined_value+4, 1), 8))/8)-1))&(~960))&2147483648)>>31
139139
// ASM-NEXT: .amdhsa_shared_vgpr_count 0
140140
// ASM-NEXT: .amdhsa_exception_fp_ieee_invalid_op (((((((((((((((((((((((((128|(defined_2_bits<<11))&(~128))|(defined_boolean<<7))&(~256))|(defined_boolean<<8))&(~512))|(defined_boolean<<9))&(~1024))|(defined_boolean<<10))&(~16777216))|(defined_boolean<<24))&(~33554432))|(defined_boolean<<25))&(~67108864))|(defined_boolean<<26))&(~134217728))|(defined_boolean<<27))&(~268435456))|(defined_boolean<<28))&(~536870912))|(defined_boolean<<29))&(~1073741824))|(defined_boolean<<30))&(~62))&16777216)>>24
141141
// ASM-NEXT: .amdhsa_exception_fp_denorm_src (((((((((((((((((((((((((128|(defined_2_bits<<11))&(~128))|(defined_boolean<<7))&(~256))|(defined_boolean<<8))&(~512))|(defined_boolean<<9))&(~1024))|(defined_boolean<<10))&(~16777216))|(defined_boolean<<24))&(~33554432))|(defined_boolean<<25))&(~67108864))|(defined_boolean<<26))&(~134217728))|(defined_boolean<<27))&(~268435456))|(defined_boolean<<28))&(~536870912))|(defined_boolean<<29))&(~1073741824))|(defined_boolean<<30))&(~62))&33554432)>>25

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