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Place conditionals for lazy evaluation
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llvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp

Lines changed: 5 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -5306,9 +5306,12 @@ bool AMDGPUTargetLowering::isInt64ImmLegal(SDNode *N, SelectionDAG &DAG) const {
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bool isInlineable = false;
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const auto *TII = ST.getInstrInfo();
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5309-
if (!SDConstant && !SDFPConstant)
5309+
if (!ST.hasMovB64() || (!SDConstant && !SDFPConstant))
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return false;
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5312+
if (ST.has64BitLiterals())
5313+
return true;
5314+
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uint64_t Val = 0;
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if (SDConstant) {
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const APInt &APVal = SDConstant->getAPIntValue();
@@ -5320,8 +5323,7 @@ bool AMDGPUTargetLowering::isInt64ImmLegal(SDNode *N, SelectionDAG &DAG) const {
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Val = APVal.bitcastToAPInt().getZExtValue();
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}
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5323-
return ST.hasMovB64() &&
5324-
(ST.has64BitLiterals() || isUInt<32>(Val) || isInlineable);
5326+
return (isInlineable || isUInt<32>(Val));
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}
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SDValue AMDGPUTargetLowering::PerformDAGCombine(SDNode *N,

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