Make the checking of LPAD a predicate in RISCVInstrPredicate.td

Author: jaidTw

llvm/lib/Target/RISCV/RISCVInstrInfo.cpp

@@ -3512,7 +3512,7 @@ RISCVInstrInfo::getOutliningTypeImpl(const MachineModuleInfo &MMI,
   }
 
   // LPADs should not be outlined too
-  if (MI.getOpcode() == RISCV::AUIPC && MI.getOperand(0).getReg() == RISCV::X0)
+  if (isLPAD(MI))
     return outliner::InstrType::Illegal;
 
   return outliner::InstrType::Legal;

llvm/lib/Target/RISCV/RISCVInstrPredicates.td

@@ -148,6 +148,15 @@ def isNonZeroLoadImmediate
                      CheckNot<CheckImmOperand<2, 0>>
                    ]>>>;
 
+// Returns true if this is LPAD (auipc with rd = x0)
+def isLPAD
+    : TIIPredicate<"isLPAD",
+                   MCReturnStatement<CheckAll<[
+                     CheckOpcode<[AUIPC]>,
+                     CheckIsRegOperand<0>,
+                     CheckRegOperand<0, X0>,
+                   ]>>>;
+
 def ignoresVXRM
     : TIIPredicate<"ignoresVXRM",
                    MCOpcodeSwitchStatement<