Small fix in test

DenisGZM · DenisGZM · commit aba146b8deaf · 2025-09-23T13:08:58.000+03:00
diff --git a/llvm/unittests/CodeGen/GlobalISel/IRTranslatorBF16Test.cpp b/llvm/unittests/CodeGen/GlobalISel/IRTranslatorBF16Test.cpp
@@ -111,13 +111,13 @@ TEST_F(AArch64IRTranslatorTest, IRTranslateBfloat16) {
       llvm::MachineFunctionProperties::Property::FailedISel));
   for (auto &MI : MF->front()) {
     if (MI.getOpcode() == TargetOpcode::G_LOAD) {
-      ASSERT_EQ(MRI.getType(MI.getOperand(0).getReg()), LLT::bfloat16());
+      ASSERT_TRUE(MRI.getType(MI.getOperand(0).getReg()).isBFloat(16));
     }
 
     if (MI.getOpcode() == TargetOpcode::G_FADD ||
         MI.getOpcode() == TargetOpcode::G_FMUL) {
       for (auto &Op : MI.operands()) {
-        ASSERT_EQ(MRI.getType(Op.getReg()), LLT::bfloat16());
+        ASSERT_TRUE(MRI.getType(Op.getReg()).isBFloat(16));
       }
     }
   }

Original file line number	Diff line number	Diff line change
`@@ -111,13 +111,13 @@ TEST_F(AArch64IRTranslatorTest, IRTranslateBfloat16) {`
`111`	`111`	`llvm::MachineFunctionProperties::Property::FailedISel));`
`112`	`112`	`for (auto &MI : MF->front()) {`
`113`	`113`	`if (MI.getOpcode() == TargetOpcode::G_LOAD) {`
`114`		`- ASSERT_EQ(MRI.getType(MI.getOperand(0).getReg()), LLT::bfloat16());`
	`114`	`+ ASSERT_TRUE(MRI.getType(MI.getOperand(0).getReg()).isBFloat(16));`
`115`	`115`	`}`
`116`	`116`
`117`	`117`	`if (MI.getOpcode() == TargetOpcode::G_FADD \|\|`
`118`	`118`	`MI.getOpcode() == TargetOpcode::G_FMUL) {`
`119`	`119`	`for (auto &Op : MI.operands()) {`
`120`		`- ASSERT_EQ(MRI.getType(Op.getReg()), LLT::bfloat16());`
	`120`	`+ ASSERT_TRUE(MRI.getType(Op.getReg()).isBFloat(16));`
`121`	`121`	`}`
`122`	`122`	`}`
`123`	`123`	`}`