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X86: Remove LOW32_ADDR_ACCESS_RBPRegClass (#155127)
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2 files changed

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-13
lines changed

2 files changed

+2
-13
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llvm/lib/Target/X86/X86RegisterInfo.cpp

Lines changed: 1 addition & 9 deletions
Original file line numberDiff line numberDiff line change
@@ -204,15 +204,7 @@ X86RegisterInfo::getPointerRegClass(const MachineFunction &MF,
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// we can still use 64-bit register as long as we know the high bits
205205
// are zeros.
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// Reflect that in the returned register class.
207-
if (Is64Bit) {
208-
// When the target also allows 64-bit frame pointer and we do have a
209-
// frame, this is fine to use it for the address accesses as well.
210-
const X86FrameLowering *TFI = getFrameLowering(MF);
211-
return TFI->hasFP(MF) && TFI->Uses64BitFramePtr
212-
? &X86::LOW32_ADDR_ACCESS_RBPRegClass
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: &X86::LOW32_ADDR_ACCESSRegClass;
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}
215-
return &X86::GR32RegClass;
207+
return Is64Bit ? &X86::LOW32_ADDR_ACCESSRegClass : &X86::GR32RegClass;
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case 1: // Normal GPRs except the stack pointer (for encoding reasons).
217209
if (Subtarget.isTarget64BitLP64())
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return &X86::GR64_NOSPRegClass;

llvm/lib/Target/X86/X86RegisterInfo.td

Lines changed: 1 addition & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -716,10 +716,7 @@ def GR64_NOREX2_NOSP : RegisterClass<"X86", [i64], 64,
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// which we do not have right now.
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def LOW32_ADDR_ACCESS : RegisterClass<"X86", [i32], 32, (add GR32, RIP)>;
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719-
// When RBP is used as a base pointer in a 32-bit addresses environment,
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// this is also safe to use the full register to access addresses.
721-
// Since RBP will never be spilled, stick to a 32 alignment to save
722-
// on memory consumption.
719+
// FIXME: This is unused, but deleting it results in codegen changes
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def LOW32_ADDR_ACCESS_RBP : RegisterClass<"X86", [i32], 32,
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(add LOW32_ADDR_ACCESS, RBP)>;
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