Skip to content

Commit abc8c4b

Browse files
nikicnikic
committed
[LoopVectorize] Generate test checks (NFC)
1 parent 4780dc3 commit abc8c4b

File tree

1 file changed

+134
-47
lines changed

1 file changed

+134
-47
lines changed

‎llvm/test/Transforms/LoopVectorize/uniform-blend.ll‎

Lines changed: 134 additions & 47 deletions
Original file line numberDiff line numberDiff line change
@@ -1,20 +1,46 @@
1+
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 5
12
; RUN: opt -passes=loop-vectorize -force-vector-width=4 -S %s | FileCheck %s
23

34
@dst = external global [32 x i16], align 1
45

56
define void @blend_uniform_iv_trunc(i1 %c) {
6-
; CHECK-LABEL: @blend_uniform_iv_trunc(
7-
; CHECK: vector.body:
8-
; CHECK-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %vector.ph ], [ [[INDEX_NEXT:%.*]], %vector.body ]
9-
; CHECK-NEXT: [[TMP1:%.*]] = trunc i64 [[INDEX]] to i16
10-
; CHECK-NEXT: [[TMP2:%.*]] = add i16 [[TMP1]], 0
11-
; CHECK-NEXT: [[PREDPHI:%.*]] = select i1 %c, i16 [[TMP2]], i16 undef
12-
; CHECK-NEXT: [[TMP5:%.*]] = getelementptr inbounds [32 x i16], ptr @dst, i16 0, i16 [[PREDPHI]]
13-
; CHECK-NEXT: [[TMP6:%.*]] = getelementptr inbounds i16, ptr [[TMP5]], i32 0
14-
; CHECK-NEXT: store <4 x i16> zeroinitializer, ptr [[TMP6]], align 2
7+
; CHECK-LABEL: define void @blend_uniform_iv_trunc(
8+
; CHECK-SAME: i1 [[C:%.*]]) {
9+
; CHECK-NEXT: [[ENTRY:.*]]:
10+
; CHECK-NEXT: br i1 false, label %[[SCALAR_PH:.*]], label %[[VECTOR_PH:.*]]
11+
; CHECK: [[VECTOR_PH]]:
12+
; CHECK-NEXT: br label %[[VECTOR_BODY:.*]]
13+
; CHECK: [[VECTOR_BODY]]:
14+
; CHECK-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]
15+
; CHECK-NEXT: [[TMP0:%.*]] = trunc i64 [[INDEX]] to i16
16+
; CHECK-NEXT: [[TMP1:%.*]] = add i16 [[TMP0]], 0
17+
; CHECK-NEXT: [[PREDPHI:%.*]] = select i1 [[C]], i16 [[TMP1]], i16 undef
18+
; CHECK-NEXT: [[TMP2:%.*]] = getelementptr inbounds [32 x i16], ptr @dst, i16 0, i16 [[PREDPHI]]
19+
; CHECK-NEXT: [[TMP3:%.*]] = getelementptr inbounds i16, ptr [[TMP2]], i32 0
20+
; CHECK-NEXT: store <4 x i16> zeroinitializer, ptr [[TMP3]], align 2
1521
; CHECK-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 4
16-
; CHECK-NEXT: [[TMP8:%.*]] = icmp eq i64 [[INDEX_NEXT]], 32
17-
; CHECK-NEXT: br i1 [[TMP8]], label %middle.block, label %vector.body
22+
; CHECK-NEXT: [[TMP4:%.*]] = icmp eq i64 [[INDEX_NEXT]], 32
23+
; CHECK-NEXT: br i1 [[TMP4]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP0:![0-9]+]]
24+
; CHECK: [[MIDDLE_BLOCK]]:
25+
; CHECK-NEXT: br i1 true, label %[[EXIT:.*]], label %[[SCALAR_PH]]
26+
; CHECK: [[SCALAR_PH]]:
27+
; CHECK-NEXT: [[BC_RESUME_VAL:%.*]] = phi i64 [ 32, %[[MIDDLE_BLOCK]] ], [ 0, %[[ENTRY]] ]
28+
; CHECK-NEXT: br label %[[LOOP_HEADER:.*]]
29+
; CHECK: [[LOOP_HEADER]]:
30+
; CHECK-NEXT: [[IV:%.*]] = phi i64 [ [[BC_RESUME_VAL]], %[[SCALAR_PH]] ], [ [[IV_NEXT:%.*]], %[[LOOP_LATCH:.*]] ]
31+
; CHECK-NEXT: [[IV_TRUNC_2:%.*]] = trunc i64 [[IV]] to i16
32+
; CHECK-NEXT: br i1 [[C]], label %[[LOOP_NEXT:.*]], label %[[LOOP_LATCH]]
33+
; CHECK: [[LOOP_NEXT]]:
34+
; CHECK-NEXT: br label %[[LOOP_LATCH]]
35+
; CHECK: [[LOOP_LATCH]]:
36+
; CHECK-NEXT: [[BLEND:%.*]] = phi i16 [ undef, %[[LOOP_HEADER]] ], [ [[IV_TRUNC_2]], %[[LOOP_NEXT]] ]
37+
; CHECK-NEXT: [[DST_PTR:%.*]] = getelementptr inbounds [32 x i16], ptr @dst, i16 0, i16 [[BLEND]]
38+
; CHECK-NEXT: store i16 0, ptr [[DST_PTR]], align 2
39+
; CHECK-NEXT: [[IV_NEXT]] = add nuw nsw i64 [[IV]], 1
40+
; CHECK-NEXT: [[CMP439:%.*]] = icmp ult i64 [[IV]], 31
41+
; CHECK-NEXT: br i1 [[CMP439]], label %[[LOOP_HEADER]], label %[[EXIT]], !llvm.loop [[LOOP3:![0-9]+]]
42+
; CHECK: [[EXIT]]:
43+
; CHECK-NEXT: ret void
1844
;
1945
entry:
2046
br label %loop.header
@@ -40,20 +66,43 @@ exit: ; preds = %loop.latch
4066
}
4167

4268
define void @blend_uniform_iv(i1 %c) {
43-
; CHECK-LABEL: @blend_uniform_iv(
44-
; CHECK: vector.ph:
45-
46-
; CHECK: vector.body:
47-
; CHECK-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %vector.ph ], [ [[INDEX_NEXT:%.*]], %vector.body ]
69+
; CHECK-LABEL: define void @blend_uniform_iv(
70+
; CHECK-SAME: i1 [[C:%.*]]) {
71+
; CHECK-NEXT: [[ENTRY:.*]]:
72+
; CHECK-NEXT: br i1 false, label %[[SCALAR_PH:.*]], label %[[VECTOR_PH:.*]]
73+
; CHECK: [[VECTOR_PH]]:
74+
; CHECK-NEXT: br label %[[VECTOR_BODY:.*]]
75+
; CHECK: [[VECTOR_BODY]]:
76+
; CHECK-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]
4877
; CHECK-NEXT: [[TMP0:%.*]] = add i64 [[INDEX]], 0
49-
; CHECK-NEXT: [[PREDPHI:%.*]] = select i1 %c, i64 [[TMP0]], i64 undef
50-
; CHECK-NEXT: [[TMP3:%.*]] = getelementptr inbounds [32 x i16], ptr @dst, i16 0, i64 [[PREDPHI]]
51-
; CHECK-NEXT: [[TMP4:%.*]] = getelementptr inbounds i16, ptr [[TMP3]], i32 0
52-
; CHECK-NEXT: store <4 x i16> zeroinitializer, ptr [[TMP4]], align 2
78+
; CHECK-NEXT: [[PREDPHI:%.*]] = select i1 [[C]], i64 [[TMP0]], i64 undef
79+
; CHECK-NEXT: [[TMP1:%.*]] = getelementptr inbounds [32 x i16], ptr @dst, i16 0, i64 [[PREDPHI]]
80+
; CHECK-NEXT: [[TMP2:%.*]] = getelementptr inbounds i16, ptr [[TMP1]], i32 0
81+
; CHECK-NEXT: store <4 x i16> zeroinitializer, ptr [[TMP2]], align 2
5382
; CHECK-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 4
54-
; CHECK-NEXT: [[TMP6:%.*]] = icmp eq i64 [[INDEX_NEXT]], 32
55-
; CHECK-NEXT: br i1 [[TMP6]], label %middle.block, label %vector.body
83+
; CHECK-NEXT: [[TMP3:%.*]] = icmp eq i64 [[INDEX_NEXT]], 32
84+
; CHECK-NEXT: br i1 [[TMP3]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP4:![0-9]+]]
85+
; CHECK: [[MIDDLE_BLOCK]]:
86+
; CHECK-NEXT: br i1 true, label %[[EXIT:.*]], label %[[SCALAR_PH]]
87+
; CHECK: [[SCALAR_PH]]:
88+
; CHECK-NEXT: [[BC_RESUME_VAL:%.*]] = phi i64 [ 32, %[[MIDDLE_BLOCK]] ], [ 0, %[[ENTRY]] ]
89+
; CHECK-NEXT: br label %[[LOOP_HEADER:.*]]
90+
; CHECK: [[LOOP_HEADER]]:
91+
; CHECK-NEXT: [[IV:%.*]] = phi i64 [ [[BC_RESUME_VAL]], %[[SCALAR_PH]] ], [ [[IV_NEXT:%.*]], %[[LOOP_LATCH:.*]] ]
92+
; CHECK-NEXT: br i1 [[C]], label %[[LOOP_NEXT:.*]], label %[[LOOP_LATCH]]
93+
; CHECK: [[LOOP_NEXT]]:
94+
; CHECK-NEXT: br label %[[LOOP_LATCH]]
95+
; CHECK: [[LOOP_LATCH]]:
96+
; CHECK-NEXT: [[BLEND:%.*]] = phi i64 [ undef, %[[LOOP_HEADER]] ], [ [[IV]], %[[LOOP_NEXT]] ]
97+
; CHECK-NEXT: [[DST_PTR:%.*]] = getelementptr inbounds [32 x i16], ptr @dst, i16 0, i64 [[BLEND]]
98+
; CHECK-NEXT: store i16 0, ptr [[DST_PTR]], align 2
99+
; CHECK-NEXT: [[IV_NEXT]] = add nuw nsw i64 [[IV]], 1
100+
; CHECK-NEXT: [[CMP439:%.*]] = icmp ult i64 [[IV]], 31
101+
; CHECK-NEXT: br i1 [[CMP439]], label %[[LOOP_HEADER]], label %[[EXIT]], !llvm.loop [[LOOP5:![0-9]+]]
102+
; CHECK: [[EXIT]]:
103+
; CHECK-NEXT: ret void
56104
;
105+
57106
entry:
58107
br label %loop.header
59108

@@ -77,34 +126,62 @@ exit: ; preds = %loop.latch
77126
}
78127

79128
define void @blend_chain_iv(i1 %c) {
80-
; CHECK-LABEL: @blend_chain_iv(
81-
; CHECK: vector.ph:
82-
; CHECK-NEXT: [[MASK0:%.*]] = insertelement <4 x i1> poison, i1 %c, i64 0
83-
; CHECK-NEXT: [[MASK1:%.*]] = shufflevector <4 x i1> [[MASK0]], <4 x i1> poison, <4 x i32> zeroinitializer
84-
85-
; CHECK: vector.body:
86-
; CHECK-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %vector.ph ], [ [[INDEX_NEXT:%.*]], %vector.body ]
87-
; CHECK-NEXT: [[VEC_IND:%.*]] = phi <4 x i64> [ <i64 0, i64 1, i64 2, i64 3>, %vector.ph ], [ [[VEC_IND_NEXT:%.*]], %vector.body ]
88-
; CHECK-NEXT: [[TMP6:%.*]] = select <4 x i1> [[MASK1]], <4 x i1> [[MASK1]], <4 x i1> zeroinitializer
89-
; CHECK-NEXT: [[PREDPHI:%.*]] = select <4 x i1> [[TMP6]], <4 x i64> [[VEC_IND]], <4 x i64> undef
90-
; CHECK-NEXT: [[PREDPHI1:%.*]] = select <4 x i1> [[MASK1]], <4 x i64> [[PREDPHI]], <4 x i64> undef
91-
; CHECK-NEXT: [[TMP9:%.*]] = extractelement <4 x i64> [[PREDPHI1]], i32 0
92-
; CHECK-NEXT: [[TMP10:%.*]] = getelementptr inbounds [32 x i16], ptr @dst, i16 0, i64 [[TMP9]]
93-
; CHECK-NEXT: [[TMP11:%.*]] = extractelement <4 x i64> [[PREDPHI1]], i32 1
94-
; CHECK-NEXT: [[TMP12:%.*]] = getelementptr inbounds [32 x i16], ptr @dst, i16 0, i64 [[TMP11]]
95-
; CHECK-NEXT: [[TMP13:%.*]] = extractelement <4 x i64> [[PREDPHI1]], i32 2
96-
; CHECK-NEXT: [[TMP14:%.*]] = getelementptr inbounds [32 x i16], ptr @dst, i16 0, i64 [[TMP13]]
97-
; CHECK-NEXT: [[TMP15:%.*]] = extractelement <4 x i64> [[PREDPHI1]], i32 3
98-
; CHECK-NEXT: [[TMP16:%.*]] = getelementptr inbounds [32 x i16], ptr @dst, i16 0, i64 [[TMP15]]
99-
; CHECK-NEXT: store i16 0, ptr [[TMP10]], align 2
100-
; CHECK-NEXT: store i16 0, ptr [[TMP12]], align 2
101-
; CHECK-NEXT: store i16 0, ptr [[TMP14]], align 2
102-
; CHECK-NEXT: store i16 0, ptr [[TMP16]], align 2
129+
; CHECK-LABEL: define void @blend_chain_iv(
130+
; CHECK-SAME: i1 [[C:%.*]]) {
131+
; CHECK-NEXT: [[ENTRY:.*]]:
132+
; CHECK-NEXT: br i1 false, label %[[SCALAR_PH:.*]], label %[[VECTOR_PH:.*]]
133+
; CHECK: [[VECTOR_PH]]:
134+
; CHECK-NEXT: [[BROADCAST_SPLATINSERT:%.*]] = insertelement <4 x i1> poison, i1 [[C]], i64 0
135+
; CHECK-NEXT: [[BROADCAST_SPLAT:%.*]] = shufflevector <4 x i1> [[BROADCAST_SPLATINSERT]], <4 x i1> poison, <4 x i32> zeroinitializer
136+
; CHECK-NEXT: br label %[[VECTOR_BODY:.*]]
137+
; CHECK: [[VECTOR_BODY]]:
138+
; CHECK-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]
139+
; CHECK-NEXT: [[VEC_IND:%.*]] = phi <4 x i64> [ <i64 0, i64 1, i64 2, i64 3>, %[[VECTOR_PH]] ], [ [[VEC_IND_NEXT:%.*]], %[[VECTOR_BODY]] ]
140+
; CHECK-NEXT: [[TMP0:%.*]] = select <4 x i1> [[BROADCAST_SPLAT]], <4 x i1> [[BROADCAST_SPLAT]], <4 x i1> zeroinitializer
141+
; CHECK-NEXT: [[PREDPHI:%.*]] = select <4 x i1> [[TMP0]], <4 x i64> [[VEC_IND]], <4 x i64> undef
142+
; CHECK-NEXT: [[PREDPHI1:%.*]] = select <4 x i1> [[BROADCAST_SPLAT]], <4 x i64> [[PREDPHI]], <4 x i64> undef
143+
; CHECK-NEXT: [[TMP1:%.*]] = extractelement <4 x i64> [[PREDPHI1]], i32 0
144+
; CHECK-NEXT: [[TMP2:%.*]] = getelementptr inbounds [32 x i16], ptr @dst, i16 0, i64 [[TMP1]]
145+
; CHECK-NEXT: [[TMP3:%.*]] = extractelement <4 x i64> [[PREDPHI1]], i32 1
146+
; CHECK-NEXT: [[TMP4:%.*]] = getelementptr inbounds [32 x i16], ptr @dst, i16 0, i64 [[TMP3]]
147+
; CHECK-NEXT: [[TMP5:%.*]] = extractelement <4 x i64> [[PREDPHI1]], i32 2
148+
; CHECK-NEXT: [[TMP6:%.*]] = getelementptr inbounds [32 x i16], ptr @dst, i16 0, i64 [[TMP5]]
149+
; CHECK-NEXT: [[TMP7:%.*]] = extractelement <4 x i64> [[PREDPHI1]], i32 3
150+
; CHECK-NEXT: [[TMP8:%.*]] = getelementptr inbounds [32 x i16], ptr @dst, i16 0, i64 [[TMP7]]
151+
; CHECK-NEXT: store i16 0, ptr [[TMP2]], align 2
152+
; CHECK-NEXT: store i16 0, ptr [[TMP4]], align 2
153+
; CHECK-NEXT: store i16 0, ptr [[TMP6]], align 2
154+
; CHECK-NEXT: store i16 0, ptr [[TMP8]], align 2
103155
; CHECK-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 4
104156
; CHECK-NEXT: [[VEC_IND_NEXT]] = add <4 x i64> [[VEC_IND]], <i64 4, i64 4, i64 4, i64 4>
105-
; CHECK-NEXT: [[TMP17:%.*]] = icmp eq i64 [[INDEX_NEXT]], 32
106-
; CHECK-NEXT: br i1 [[TMP17]], label %middle.block, label %vector.body
157+
; CHECK-NEXT: [[TMP9:%.*]] = icmp eq i64 [[INDEX_NEXT]], 32
158+
; CHECK-NEXT: br i1 [[TMP9]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP6:![0-9]+]]
159+
; CHECK: [[MIDDLE_BLOCK]]:
160+
; CHECK-NEXT: br i1 true, label %[[EXIT:.*]], label %[[SCALAR_PH]]
161+
; CHECK: [[SCALAR_PH]]:
162+
; CHECK-NEXT: [[BC_RESUME_VAL:%.*]] = phi i64 [ 32, %[[MIDDLE_BLOCK]] ], [ 0, %[[ENTRY]] ]
163+
; CHECK-NEXT: br label %[[LOOP_HEADER:.*]]
164+
; CHECK: [[LOOP_HEADER]]:
165+
; CHECK-NEXT: [[IV:%.*]] = phi i64 [ [[BC_RESUME_VAL]], %[[SCALAR_PH]] ], [ [[IV_NEXT:%.*]], %[[LOOP_LATCH:.*]] ]
166+
; CHECK-NEXT: br i1 [[C]], label %[[LOOP_NEXT:.*]], label %[[LOOP_LATCH]]
167+
; CHECK: [[LOOP_NEXT]]:
168+
; CHECK-NEXT: br i1 [[C]], label %[[LOOP_NEXT_2:.*]], label %[[LOOP_NEXT_3:.*]]
169+
; CHECK: [[LOOP_NEXT_2]]:
170+
; CHECK-NEXT: br label %[[LOOP_NEXT_3]]
171+
; CHECK: [[LOOP_NEXT_3]]:
172+
; CHECK-NEXT: [[BLEND_1:%.*]] = phi i64 [ undef, %[[LOOP_NEXT]] ], [ [[IV]], %[[LOOP_NEXT_2]] ]
173+
; CHECK-NEXT: br label %[[LOOP_LATCH]]
174+
; CHECK: [[LOOP_LATCH]]:
175+
; CHECK-NEXT: [[BLEND:%.*]] = phi i64 [ undef, %[[LOOP_HEADER]] ], [ [[BLEND_1]], %[[LOOP_NEXT_3]] ]
176+
; CHECK-NEXT: [[DST_PTR:%.*]] = getelementptr inbounds [32 x i16], ptr @dst, i16 0, i64 [[BLEND]]
177+
; CHECK-NEXT: store i16 0, ptr [[DST_PTR]], align 2
178+
; CHECK-NEXT: [[IV_NEXT]] = add nuw nsw i64 [[IV]], 1
179+
; CHECK-NEXT: [[CMP439:%.*]] = icmp ult i64 [[IV]], 31
180+
; CHECK-NEXT: br i1 [[CMP439]], label %[[LOOP_HEADER]], label %[[EXIT]], !llvm.loop [[LOOP7:![0-9]+]]
181+
; CHECK: [[EXIT]]:
182+
; CHECK-NEXT: ret void
107183
;
184+
108185
entry:
109186
br label %loop.header
110187

@@ -133,3 +210,13 @@ loop.latch: ; preds = %loop.next, %loop.he
133210
exit: ; preds = %loop.latch
134211
ret void
135212
}
213+
;.
214+
; CHECK: [[LOOP0]] = distinct !{[[LOOP0]], [[META1:![0-9]+]], [[META2:![0-9]+]]}
215+
; CHECK: [[META1]] = !{!"llvm.loop.isvectorized", i32 1}
216+
; CHECK: [[META2]] = !{!"llvm.loop.unroll.runtime.disable"}
217+
; CHECK: [[LOOP3]] = distinct !{[[LOOP3]], [[META2]], [[META1]]}
218+
; CHECK: [[LOOP4]] = distinct !{[[LOOP4]], [[META1]], [[META2]]}
219+
; CHECK: [[LOOP5]] = distinct !{[[LOOP5]], [[META2]], [[META1]]}
220+
; CHECK: [[LOOP6]] = distinct !{[[LOOP6]], [[META1]], [[META2]]}
221+
; CHECK: [[LOOP7]] = distinct !{[[LOOP7]], [[META2]], [[META1]]}
222+
;.

0 commit comments

Comments
 (0)