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| 1 | +; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 5 |
| 2 | +; RUN: opt < %s -passes=infer-alignment -S | FileCheck %s |
| 3 | + |
| 4 | +define <2 x i32> @load(<2 x i1> %mask, ptr %ptr) { |
| 5 | +; CHECK-LABEL: define <2 x i32> @load( |
| 6 | +; CHECK-SAME: <2 x i1> [[MASK:%.*]], ptr [[PTR:%.*]]) { |
| 7 | +; CHECK-NEXT: [[ENTRY:.*:]] |
| 8 | +; CHECK-NEXT: call void @llvm.assume(i1 true) [ "align"(ptr [[PTR]], i64 64) ] |
| 9 | +; CHECK-NEXT: [[MASKED_LOAD:%.*]] = call <2 x i32> @llvm.masked.load.v2i32.p0(ptr [[PTR]], i32 64, <2 x i1> [[MASK]], <2 x i32> poison) |
| 10 | +; CHECK-NEXT: ret <2 x i32> [[MASKED_LOAD]] |
| 11 | +; |
| 12 | +entry: |
| 13 | + call void @llvm.assume(i1 true) [ "align"(ptr %ptr, i64 64) ] |
| 14 | + %masked_load = call <2 x i32> @llvm.masked.load.v2i32.p0(ptr %ptr, i32 1, <2 x i1> %mask, <2 x i32> poison) |
| 15 | + ret <2 x i32> %masked_load |
| 16 | +} |
| 17 | + |
| 18 | +define void @store(<2 x i1> %mask, <2 x i32> %val, ptr %ptr) { |
| 19 | +; CHECK-LABEL: define void @store( |
| 20 | +; CHECK-SAME: <2 x i1> [[MASK:%.*]], <2 x i32> [[VAL:%.*]], ptr [[PTR:%.*]]) { |
| 21 | +; CHECK-NEXT: [[ENTRY:.*:]] |
| 22 | +; CHECK-NEXT: call void @llvm.assume(i1 true) [ "align"(ptr [[PTR]], i64 64) ] |
| 23 | +; CHECK-NEXT: tail call void @llvm.masked.store.v2i32.p0(<2 x i32> [[VAL]], ptr [[PTR]], i32 64, <2 x i1> [[MASK]]) |
| 24 | +; CHECK-NEXT: ret void |
| 25 | +; |
| 26 | +entry: |
| 27 | + call void @llvm.assume(i1 true) [ "align"(ptr %ptr, i64 64) ] |
| 28 | + tail call void @llvm.masked.store.v2i32.p0(<2 x i32> %val, ptr %ptr, i32 1, <2 x i1> %mask) |
| 29 | + ret void |
| 30 | +} |
| 31 | + |
| 32 | +declare void @llvm.assume(i1) |
| 33 | +declare <2 x i32> @llvm.masked.load.v2i32.p0(ptr, i32, <2 x i1>, <2 x i32>) |
| 34 | +declare void @llvm.masked.store.v2i32.p0(<2 x i32>, ptr, i32, <2 x i1>) |
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