[LoongArch] Use FirstRelocationKind to remove ELFObjectWriter::recordRelocation special case

The current implementation of R_LARCH_SUB{8,16,32,64} and TLS relocation types relies on fixup kinds FirstLiteralRelocationKind + offset (originally intended for .reloc directives). While this is clever and prevents switch cases like

```
case fixup_...sub8:
  return ELF::R_LARCH_SUB8;
```

it needs revision.

GNU Assembler treats .reloc directives differently from standard relocations, notably by skipping

* Skipping STT_SECTION adjustments (when a referenced symbol is local and satisfies certain conditions, it can be redirected to a section symbol).
* Skipping STT_TLS symbol type setting for TLS relocations.

Encode relocatin type t with FirstRelocationKind+t instead of
FirstLiteralRelocationKind+t. The new value is less than
FirstLiteralRelocationKind and will not be treated as a .reloc
directive.

Close #135521

Author: MaskRay

llvm/include/llvm/MC/MCFixup.h

@@ -36,10 +36,13 @@ enum MCFixupKind {
 
   FirstTargetFixupKind = 128,
 
+  /// Targets can use FirstRelocationKind+t to encode relocation type t.
+  FirstRelocationKind = 256,
+
   /// The range [FirstLiteralRelocationKind, MaxTargetFixupKind) is used for
   /// relocations coming from .reloc directive. Fixup kind
   /// FirstLiteralRelocationKind+V represents the relocation type with number V.
-  FirstLiteralRelocationKind = 256,
+  FirstLiteralRelocationKind = 256 + 1032 + 32,
 
   /// Set limit to accommodate the highest reloc type in use for all Targets,
   /// currently R_AARCH64_IRELATIVE at 1032, including room for expansion.

llvm/lib/MC/ELFObjectWriter.cpp

@@ -1385,8 +1385,7 @@ void ELFObjectWriter::recordRelocation(MCAssembler &Asm,
 
   auto EMachine = TargetObjectWriter->getEMachine();
   unsigned Type;
-  if (Fixup.getKind() >= FirstLiteralRelocationKind &&
-      EMachine != ELF::EM_LOONGARCH)
+  if (Fixup.getKind() >= FirstLiteralRelocationKind)
     Type = Fixup.getKind() - FirstLiteralRelocationKind;
   else
     Type = TargetObjectWriter->getRelocType(Ctx, Target, Fixup, IsPCRel);

llvm/lib/Target/LoongArch/MCTargetDesc/LoongArchAsmBackend.cpp

@@ -70,7 +70,7 @@ LoongArchAsmBackend::getFixupKindInfo(MCFixupKind Kind) const {
 
   // Fixup kinds from .reloc directive are like R_LARCH_NONE. They
   // do not require any extra processing.
-  if (Kind >= FirstLiteralRelocationKind)
+  if (unsigned(Kind) >= FirstRelocationKind)
     return MCAsmBackend::getFixupKindInfo(FK_NONE);
 
   if (Kind < FirstTargetFixupKind)
@@ -152,10 +152,10 @@ void LoongArchAsmBackend::applyFixup(const MCAssembler &Asm,
   if (!Value)
     return; // Doesn't change encoding.
 
-  MCFixupKind Kind = Fixup.getKind();
-  if (Kind >= FirstLiteralRelocationKind)
+  auto Kind = Fixup.getTargetKind();
+  if (Kind >= FirstRelocationKind)
     return;
-  MCFixupKindInfo Info = getFixupKindInfo(Kind);
+  MCFixupKindInfo Info = getFixupKindInfo(MCFixupKind(Kind));
   MCContext &Ctx = Asm.getContext();
 
   // Fixup leb128 separately.
@@ -271,29 +271,27 @@ getRelocPairForSize(unsigned Size) {
   default:
     llvm_unreachable("unsupported fixup size");
   case 6:
-    return std::make_pair(
-        MCFixupKind(FirstLiteralRelocationKind + ELF::R_LARCH_ADD6),
-        MCFixupKind(FirstLiteralRelocationKind + ELF::R_LARCH_SUB6));
+    return std::make_pair(MCFixupKind(FirstRelocationKind + ELF::R_LARCH_ADD6),
+                          MCFixupKind(FirstRelocationKind + ELF::R_LARCH_SUB6));
   case 8:
-    return std::make_pair(
-        MCFixupKind(FirstLiteralRelocationKind + ELF::R_LARCH_ADD8),
-        MCFixupKind(FirstLiteralRelocationKind + ELF::R_LARCH_SUB8));
+    return std::make_pair(MCFixupKind(FirstRelocationKind + ELF::R_LARCH_ADD8),
+                          MCFixupKind(FirstRelocationKind + ELF::R_LARCH_SUB8));
   case 16:
     return std::make_pair(
-        MCFixupKind(FirstLiteralRelocationKind + ELF::R_LARCH_ADD16),
-        MCFixupKind(FirstLiteralRelocationKind + ELF::R_LARCH_SUB16));
+        MCFixupKind(FirstRelocationKind + ELF::R_LARCH_ADD16),
+        MCFixupKind(FirstRelocationKind + ELF::R_LARCH_SUB16));
   case 32:
     return std::make_pair(
-        MCFixupKind(FirstLiteralRelocationKind + ELF::R_LARCH_ADD32),
-        MCFixupKind(FirstLiteralRelocationKind + ELF::R_LARCH_SUB32));
+        MCFixupKind(FirstRelocationKind + ELF::R_LARCH_ADD32),
+        MCFixupKind(FirstRelocationKind + ELF::R_LARCH_SUB32));
   case 64:
     return std::make_pair(
-        MCFixupKind(FirstLiteralRelocationKind + ELF::R_LARCH_ADD64),
-        MCFixupKind(FirstLiteralRelocationKind + ELF::R_LARCH_SUB64));
+        MCFixupKind(FirstRelocationKind + ELF::R_LARCH_ADD64),
+        MCFixupKind(FirstRelocationKind + ELF::R_LARCH_SUB64));
   case 128:
     return std::make_pair(
-        MCFixupKind(FirstLiteralRelocationKind + ELF::R_LARCH_ADD_ULEB128),
-        MCFixupKind(FirstLiteralRelocationKind + ELF::R_LARCH_SUB_ULEB128));
+        MCFixupKind(FirstRelocationKind + ELF::R_LARCH_ADD_ULEB128),
+        MCFixupKind(FirstRelocationKind + ELF::R_LARCH_SUB_ULEB128));
   }
 }
 

llvm/lib/Target/LoongArch/MCTargetDesc/LoongArchELFObjectWriter.cpp

@@ -50,6 +50,12 @@ unsigned LoongArchELFObjectWriter::getRelocType(MCContext &Ctx,
                                                 const MCValue &Target,
                                                 const MCFixup &Fixup,
                                                 bool IsPCRel) const {
+  // Determine the type of the relocation
+  unsigned Kind = Fixup.getTargetKind();
+
+  if (Kind >= FirstLiteralRelocationKind)
+    return Kind - FirstLiteralRelocationKind;
+
   switch (Target.getSpecifier()) {
   case LoongArchMCExpr::VK_TLS_LE_HI20:
   case LoongArchMCExpr::VK_TLS_IE_PC_HI20:
@@ -71,12 +77,8 @@ unsigned LoongArchELFObjectWriter::getRelocType(MCContext &Ctx,
     break;
   }
 
-  // Determine the type of the relocation
-  unsigned Kind = Fixup.getTargetKind();
-
-  if (Kind >= FirstLiteralRelocationKind)
-    return Kind - FirstLiteralRelocationKind;
-
+  if (Kind >= FirstRelocationKind)
+    return Kind - FirstRelocationKind;
   switch (Kind) {
   default:
     Ctx.reportError(Fixup.getLoc(), "Unsupported relocation type");

llvm/lib/Target/LoongArch/MCTargetDesc/LoongArchFixupKinds.h

@@ -52,11 +52,10 @@ enum Fixups {
   fixup_loongarch_invalid,
   NumTargetFixupKinds = fixup_loongarch_invalid - FirstTargetFixupKind,
 
-  // Define fixups for force relocation as FirstLiteralRelocationKind+V
+  // Define fixups for force relocation as FirstRelocationKind+V
   // represents the relocation type with number V.
   // 20-bit fixup corresponding to %pc_hi20(foo) for instruction pcalau12i.
-  fixup_loongarch_pcala_hi20 =
-      FirstLiteralRelocationKind + ELF::R_LARCH_PCALA_HI20,
+  fixup_loongarch_pcala_hi20 = FirstRelocationKind + ELF::R_LARCH_PCALA_HI20,
   // 12-bit fixup corresponding to %pc_lo12(foo) for instructions like addi.w/d.
   fixup_loongarch_pcala_lo12,
   // 20-bit fixup corresponding to %pc64_lo20(foo) for instruction lu32i.d.
@@ -83,7 +82,7 @@ enum Fixups {
   // Skip R_LARCH_TLS_LE_*.
   // 20-bit fixup corresponding to %ie_pc_hi20(foo) for instruction pcalau12i.
   fixup_loongarch_tls_ie_pc_hi20 =
-      FirstLiteralRelocationKind + ELF::R_LARCH_TLS_IE_PC_HI20,
+      FirstRelocationKind + ELF::R_LARCH_TLS_IE_PC_HI20,
   // 12-bit fixup corresponding to %ie_pc_lo12(foo) for instructions
   // ld.w/ld.d/add.d.
   fixup_loongarch_tls_ie_pc_lo12,
@@ -108,17 +107,17 @@ enum Fixups {
   // 20-bit fixup corresponding to %gd_hi20(foo) for instruction lu12i.w.
   fixup_loongarch_tls_gd_hi20,
   // Generate an R_LARCH_RELAX which indicates the linker may relax here.
-  fixup_loongarch_relax = FirstLiteralRelocationKind + ELF::R_LARCH_RELAX,
+  fixup_loongarch_relax = FirstRelocationKind + ELF::R_LARCH_RELAX,
   // Generate an R_LARCH_ALIGN which indicates the linker may fixup align here.
-  fixup_loongarch_align = FirstLiteralRelocationKind + ELF::R_LARCH_ALIGN,
+  fixup_loongarch_align = FirstRelocationKind + ELF::R_LARCH_ALIGN,
   // 20-bit fixup corresponding to %pcrel_20(foo) for instruction pcaddi.
   fixup_loongarch_pcrel20_s2,
   // 36-bit fixup corresponding to %call36(foo) for a pair instructions:
   // pcaddu18i+jirl.
-  fixup_loongarch_call36 = FirstLiteralRelocationKind + ELF::R_LARCH_CALL36,
+  fixup_loongarch_call36 = FirstRelocationKind + ELF::R_LARCH_CALL36,
   // 20-bit fixup corresponding to %desc_pc_hi20(foo) for instruction pcalau12i.
   fixup_loongarch_tls_desc_pc_hi20 =
-      FirstLiteralRelocationKind + ELF::R_LARCH_TLS_DESC_PC_HI20,
+      FirstRelocationKind + ELF::R_LARCH_TLS_DESC_PC_HI20,
   // 12-bit fixup corresponding to %desc_pc_lo12(foo) for instructions like
   // addi.w/d.
   fixup_loongarch_tls_desc_pc_lo12,