@@ -1170,6 +1170,10 @@ let TargetPrefix = "nvvm" in {
11701170 //
11711171 // Convert
11721172 //
1173+ // TODO: All these intrinsics are defined as PureIntrinsic, this attaches the
1174+ // IntrSpeculatable property to them. Consider if some of these should
1175+ // have this attribute removed as they may be too expensive.
1176+ //
11731177 def int_nvvm_lohi_i2d : NVVMBuiltin,
11741178 PureIntrinsic<[llvm_double_ty], [llvm_i32_ty, llvm_i32_ty]>;
11751179
@@ -1367,30 +1371,36 @@ let TargetPrefix = "nvvm" in {
13671371 def int_nvvm_barrier_cluster_wait_aligned : Intrinsic<[]>;
13681372 }
13691373
1374+ //
13701375 // Membar
1376+ //
13711377 let IntrProperties = [IntrNoCallback] in {
13721378 def int_nvvm_membar_cta : NVVMBuiltin, Intrinsic<[]>;
13731379 def int_nvvm_membar_gl : NVVMBuiltin, Intrinsic<[]>;
13741380 def int_nvvm_membar_sys : NVVMBuiltin, Intrinsic<[]>;
13751381 def int_nvvm_fence_sc_cluster : Intrinsic<[]>;
13761382 }
13771383
1378- // Proxy fence (uni-directional)
1379- foreach scope = ["cta", "cluster", "gpu", "sys"] in {
1380-
1381- def int_nvvm_fence_proxy_tensormap_generic_release_ # scope :
1382- Intrinsic<[], [], [IntrNoCallback],
1383- "llvm.nvvm.fence.proxy.tensormap_generic.release." # scope>;
1384-
1385- // The imm-arg 'size' can only be 128.
1386- def int_nvvm_fence_proxy_tensormap_generic_acquire_ # scope :
1387- Intrinsic<[], [llvm_ptr_ty, llvm_i32_ty],
1388- [IntrNoCallback, IntrArgMemOnly, ImmArg<ArgIndex<1>>,
1389- Range<ArgIndex<1>, 128, 129>],
1390- "llvm.nvvm.fence.proxy.tensormap_generic.acquire." # scope>;
1391- }
1384+ //
1385+ // Proxy fence (uni-directional)
1386+ //
1387+ foreach scope = ["cta", "cluster", "gpu", "sys"] in {
1388+
1389+ def int_nvvm_fence_proxy_tensormap_generic_release_ # scope :
1390+ Intrinsic<[], [], [IntrNoCallback],
1391+ "llvm.nvvm.fence.proxy.tensormap_generic.release." # scope>;
1392+
1393+ // The imm-arg 'size' can only be 128.
1394+ def int_nvvm_fence_proxy_tensormap_generic_acquire_ # scope :
1395+ Intrinsic<[], [llvm_ptr_ty, llvm_i32_ty],
1396+ [IntrNoCallback, IntrArgMemOnly, ImmArg<ArgIndex<1>>,
1397+ Range<ArgIndex<1>, 128, 129>],
1398+ "llvm.nvvm.fence.proxy.tensormap_generic.acquire." # scope>;
1399+ }
13921400
1401+ //
13931402// Async Copy
1403+ //
13941404let IntrProperties = [IntrConvergent, IntrNoCallback] in {
13951405 def int_nvvm_cp_async_mbarrier_arrive : NVVMBuiltin,
13961406 Intrinsic<[], [llvm_ptr_ty]>;
@@ -1801,13 +1811,13 @@ let IntrProperties = [IntrInaccessibleMemOnly, IntrConvergent, IntrNoCallback] i
18011811//
18021812// VOTE
18031813//
1804-
18051814let IntrProperties = [IntrInaccessibleMemOnly, IntrConvergent, IntrNoCallback] in {
18061815 def int_nvvm_vote_all : NVVMBuiltin, Intrinsic<[llvm_i1_ty], [llvm_i1_ty]>;
18071816 def int_nvvm_vote_any : NVVMBuiltin, Intrinsic<[llvm_i1_ty], [llvm_i1_ty]>;
18081817 def int_nvvm_vote_uni : NVVMBuiltin, Intrinsic<[llvm_i1_ty], [llvm_i1_ty]>;
18091818 def int_nvvm_vote_ballot : NVVMBuiltin, Intrinsic<[llvm_i32_ty], [llvm_i1_ty]>;
18101819}
1820+
18111821//
18121822// VOTE.SYNC
18131823//
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