Commit ad1a0a3
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[X86][MC] Support R_X86_64_CODE_4_GOTPC32_TLSDESC
For
lea name@tlsdesc(%rip), %reg
add
R_X86_64_CODE_4_GOTPC32_TLSDESC = 45
if the instruction starts at 4 bytes before the relocation offset. This should
be used if reg is one of the additional general-purpose registers, r16-r31, in
Intel APX. It is similar to R_X86_64_GOTPC32_TLSDESC and linker optimization
must take the different instruction encoding into account.
Linker can convert the instructions with R_X86_64_CODE_4_GOTPC32_TLSDESC to
mov $name@tpoff, %reg
if the first byte of the instruction at the relocation offset - 4 is
0xd5 (namely, encoded w/REX2 prefix) when possible.
Binutils patch: bminor/binutils-gdb@a533c8d
Binutils mailthread: https://sourceware.org/pipermail/binutils/2023-December/131463.html
ABI discussion: https://groups.google.com/g/x86-64-abi/c/ACwD-UQXVDs/m/vrgTenKyFwAJ
Blog: https://kanrobert.github.io/rfc/All-about-APX-relocation1 parent 40c8938 commit ad1a0a3
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lines changed- llvm
- include/llvm/BinaryFormat/ELFRelocs
- lib/Target/X86/MCTargetDesc
- test/MC/X86
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