Skip to content

Commit ad1be4a

Browse files
andykaylorandykaylor
authored
[CIR] Add handling for static data members (#169134)
This adds some trivial handling to force emitting of child decls inside C++ records.
1 parent 38a5dd5 commit ad1be4a

File tree

3 files changed

+100
-3
lines changed

3 files changed

+100
-3
lines changed

‎clang/include/clang/CIR/MissingFeatures.h‎

Lines changed: 0 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -240,7 +240,6 @@ struct MissingFeatures {
240240
static bool ctorConstLvalueToRvalueConversion() { return false; }
241241
static bool ctorMemcpyizer() { return false; }
242242
static bool cudaSupport() { return false; }
243-
static bool cxxRecordStaticMembers() { return false; }
244243
static bool dataLayoutTypeIsSized() { return false; }
245244
static bool dataLayoutTypeAllocSize() { return false; }
246245
static bool dataLayoutTypeStoreSize() { return false; }

‎clang/lib/CIR/CodeGen/CIRGenModule.cpp‎

Lines changed: 6 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -1556,10 +1556,14 @@ void CIRGenModule::emitTopLevelDecl(Decl *decl) {
15561556
break;
15571557

15581558
case Decl::ClassTemplateSpecialization:
1559-
case Decl::CXXRecord:
1559+
case Decl::CXXRecord: {
1560+
CXXRecordDecl *crd = cast<CXXRecordDecl>(decl);
15601561
assert(!cir::MissingFeatures::generateDebugInfo());
1561-
assert(!cir::MissingFeatures::cxxRecordStaticMembers());
1562+
for (auto *childDecl : crd->decls())
1563+
if (isa<VarDecl, CXXRecordDecl, EnumDecl>(childDecl))
1564+
emitTopLevelDecl(childDecl);
15621565
break;
1566+
}
15631567

15641568
case Decl::FileScopeAsm:
15651569
// File-scope asm is ignored during device-side CUDA compilation.

‎clang/test/CIR/CodeGen/static-members.cpp‎

Lines changed: 94 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,94 @@
1+
// RUN: %clang_cc1 -triple x86_64-unknown-linux-gnu -fclangir -emit-cir %s -o %t.cir
2+
// RUN: FileCheck %s -check-prefix=CIR --input-file=%t.cir
3+
// RUN: %clang_cc1 -triple x86_64-unknown-linux-gnu -fclangir -emit-llvm %s -o %t-cir.ll
4+
// RUN: FileCheck %s -check-prefix=LLVM --input-file=%t-cir.ll
5+
// RUN: %clang_cc1 -triple x86_64-unknown-linux-gnu -emit-llvm %s -o %t.ll
6+
// RUN: FileCheck %s -check-prefix=OGCG --input-file=%t.ll
7+
8+
struct HasDtor {
9+
~HasDtor();
10+
};
11+
struct S {
12+
static inline HasDtor hd;
13+
};
14+
15+
// CIR: cir.global linkonce_odr comdat @_ZN1S2hdE = #cir.zero : !rec_HasDtor
16+
17+
// CIR: cir.func internal private @__cxx_global_var_init() {
18+
// CIR: %[[HD:.*]] = cir.get_global @_ZN1S2hdE : !cir.ptr<!rec_HasDtor>
19+
// CIR: %[[DTOR:.*]] = cir.get_global @_ZN7HasDtorD1Ev : !cir.ptr<!cir.func<(!cir.ptr<!rec_HasDtor>)>>
20+
// CIR: %[[DTOR_CAST:.*]] = cir.cast bitcast %[[DTOR]] : !cir.ptr<!cir.func<(!cir.ptr<!rec_HasDtor>)>> -> !cir.ptr<!cir.func<(!cir.ptr<!void>)>>
21+
// CIR: %[[HD_CAST:.*]] = cir.cast bitcast %[[HD]] : !cir.ptr<!rec_HasDtor> -> !cir.ptr<!void>
22+
// CIR: %[[HANDLE:.*]] = cir.get_global @__dso_handle : !cir.ptr<i8>
23+
// CIR: cir.call @__cxa_atexit(%[[DTOR_CAST]], %[[HD_CAST]], %[[HANDLE]])
24+
25+
// LLVM: @_ZN1S2hdE = linkonce_odr global %struct.HasDtor zeroinitializer, comdat
26+
// LLVM: @_ZN5Outer5Inner2hdE = linkonce_odr global %struct.HasDtor zeroinitializer, comdat
27+
28+
// LLVM: @llvm.global_ctors = appending global [1 x { i32, ptr, ptr }] [{ i32, ptr, ptr } { i32 65535, ptr @_GLOBAL__sub_I_static_members.cpp, ptr null }]
29+
// LLVM: define internal void @__cxx_global_var_init()
30+
// LLVM: call void @__cxa_atexit(ptr @_ZN7HasDtorD1Ev, ptr @_ZN1S2hdE, ptr @__dso_handle)
31+
32+
// FIXME(cir): OGCG has a guard variable for this case that we don't generate in CIR.
33+
// This is needed because the variable linkonce_odr linkage.
34+
35+
// OGCG: @_ZN1S2hdE = linkonce_odr global %struct.HasDtor zeroinitializer, comdat
36+
// OGCG: @_ZGVN1S2hdE = linkonce_odr global i64 0, comdat($_ZN1S2hdE)
37+
// OGCG: @_ZN5Outer5Inner2hdE = linkonce_odr global %struct.HasDtor zeroinitializer, comdat
38+
// OGCG: @_ZGVN5Outer5Inner2hdE = linkonce_odr global i64 0, comdat($_ZN5Outer5Inner2hdE)
39+
// OGCG: @llvm.global_ctors = appending global [2 x { i32, ptr, ptr }] [
40+
// OGCG-SAME: { i32, ptr, ptr } { i32 65535, ptr @__cxx_global_var_init, ptr @_ZN1S2hdE },
41+
// OGCG-SAME: { i32, ptr, ptr } { i32 65535, ptr @__cxx_global_var_init.1, ptr @_ZN5Outer5Inner2hdE }]
42+
43+
// OGCG: define internal void @__cxx_global_var_init() {{.*}} section ".text.startup" comdat($_ZN1S2hdE) {
44+
// OGCG: %[[GUARD:.*]] = load atomic i8, ptr @_ZGVN1S2hdE acquire
45+
// OGCG: %[[UNINIT:.*]] = icmp eq i8 %[[GUARD]], 0
46+
// OGCG: br i1 %[[UNINIT]], label %[[INIT_CHECK:.*]], label %[[INIT_END:.*]]
47+
// OGCG: [[INIT_CHECK:.*]]:
48+
// OGCG: %[[GUARD_ACQUIRE:.*]] = call i32 @__cxa_guard_acquire(ptr @_ZGVN1S2hdE)
49+
// OGCG: %[[TOBOOL:.*]] = icmp ne i32 %[[GUARD_ACQUIRE]], 0
50+
// OGCG: br i1 %[[TOBOOL]], label %[[INIT:.*]], label %[[INIT_END]]
51+
// OGCG: [[INIT:.*]]:
52+
// OGCG: %[[ATEXIT:.*]] = call i32 @__cxa_atexit(ptr @_ZN7HasDtorD1Ev, ptr @_ZN1S2hdE, ptr @__dso_handle)
53+
// OGCG: call void @__cxa_guard_release(ptr @_ZGVN1S2hdE)
54+
// OGCG: br label %[[INIT_END]]
55+
// OGCG: [[INIT_END]]:
56+
57+
struct Outer {
58+
struct Inner {
59+
static inline HasDtor hd;
60+
};
61+
};
62+
63+
// CIR: cir.global linkonce_odr comdat @_ZN5Outer5Inner2hdE = #cir.zero : !rec_HasDtor
64+
// CIR: cir.func internal private @__cxx_global_var_init.1()
65+
// CIR: %[[HD:.*]] = cir.get_global @_ZN5Outer5Inner2hdE : !cir.ptr<!rec_HasDtor>
66+
// CIR: %[[DTOR:.*]] = cir.get_global @_ZN7HasDtorD1Ev : !cir.ptr<!cir.func<(!cir.ptr<!rec_HasDtor>)>>
67+
// CIR: %[[DTOR_CAST:.*]] = cir.cast bitcast %[[DTOR]] : !cir.ptr<!cir.func<(!cir.ptr<!rec_HasDtor>)>> -> !cir.ptr<!cir.func<(!cir.ptr<!void>)>>
68+
// CIR: %[[HD_CAST:.*]] = cir.cast bitcast %[[HD]] : !cir.ptr<!rec_HasDtor> -> !cir.ptr<!void>
69+
// CIR: %[[HANDLE:.*]] = cir.get_global @__dso_handle : !cir.ptr<i8>
70+
// CIR: cir.call @__cxa_atexit(%[[DTOR_CAST]], %[[HD_CAST]], %[[HANDLE]]) : (!cir.ptr<!cir.func<(!cir.ptr<!void>)>>, !cir.ptr<!void>, !cir.ptr<i8>) -> ()
71+
72+
// LLVM: define internal void @__cxx_global_var_init.1()
73+
// LLVM: call void @__cxa_atexit(ptr @_ZN7HasDtorD1Ev, ptr @_ZN5Outer5Inner2hdE, ptr @__dso_handle)
74+
75+
// OGCG: define internal void @__cxx_global_var_init.1() {{.*}} section ".text.startup" comdat($_ZN5Outer5Inner2hdE) {
76+
// OGCG: %[[GUARD:.*]] = load atomic i8, ptr @_ZGVN5Outer5Inner2hdE acquire
77+
// OGCG: %[[UNINIT:.*]] = icmp eq i8 %[[GUARD]], 0
78+
// OGCG: br i1 %[[UNINIT]], label %[[INIT_CHECK:.*]], label %[[INIT_END:.*]]
79+
// OGCG: [[INIT_CHECK:.*]]:
80+
// OGCG: %[[GUARD_ACQUIRE:.*]] = call i32 @__cxa_guard_acquire(ptr @_ZGVN5Outer5Inner2hdE)
81+
// OGCG: %[[TOBOOL:.*]] = icmp ne i32 %[[GUARD_ACQUIRE]], 0
82+
// OGCG: br i1 %[[TOBOOL]], label %[[INIT:.*]], label %[[INIT_END]]
83+
// OGCG: [[INIT:.*]]:
84+
// OGCG: %[[ATEXIT:.*]] = call i32 @__cxa_atexit(ptr @_ZN7HasDtorD1Ev, ptr @_ZN5Outer5Inner2hdE, ptr @__dso_handle)
85+
// OGCG: call void @__cxa_guard_release(ptr @_ZGVN5Outer5Inner2hdE)
86+
// OGCG: br label %[[INIT_END]]
87+
// OGCG: [[INIT_END]]:
88+
89+
90+
// CIR: cir.func private @_GLOBAL__sub_I_static_members.cpp()
91+
// CIR: cir.call @__cxx_global_var_init()
92+
93+
// LLVM: define void @_GLOBAL__sub_I_static_members.cpp()
94+
// LLVM: call void @__cxx_global_var_init()

0 commit comments

Comments
 (0)