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arsenmarsenm
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AMDGPU: Replace ptr addrspace(4) undef uses with poison in tests (#131095)
1 parent 315c02a commit ad99368

36 files changed

+375
-375
lines changed

‎llvm/test/CodeGen/AMDGPU/GlobalISel/function-returns.ll‎

Lines changed: 32 additions & 32 deletions
Large diffs are not rendered by default.

‎llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-call-non-fixed.ll‎

Lines changed: 4 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -65,7 +65,7 @@ define amdgpu_gfx void @test_gfx_call_external_void_func_struct_i8_i32() #0 {
6565
; CHECK-LABEL: name: test_gfx_call_external_void_func_struct_i8_i32
6666
; CHECK: bb.1 (%ir-block.0):
6767
; CHECK-NEXT: [[DEF:%[0-9]+]]:_(p4) = G_IMPLICIT_DEF
68-
; CHECK-NEXT: [[LOAD:%[0-9]+]]:_(p1) = G_LOAD [[DEF]](p4) :: (invariant load (p1) from `ptr addrspace(4) undef`, addrspace 4)
68+
; CHECK-NEXT: [[LOAD:%[0-9]+]]:_(p1) = G_LOAD [[DEF]](p4) :: (invariant load (p1) from `ptr addrspace(4) poison`, addrspace 4)
6969
; CHECK-NEXT: [[LOAD1:%[0-9]+]]:_(s8) = G_LOAD [[LOAD]](p1) :: (load (s8) from %ir.ptr0, align 4, addrspace 1)
7070
; CHECK-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 4
7171
; CHECK-NEXT: [[PTR_ADD:%[0-9]+]]:_(p1) = G_PTR_ADD [[LOAD]], [[C]](s64)
@@ -81,7 +81,7 @@ define amdgpu_gfx void @test_gfx_call_external_void_func_struct_i8_i32() #0 {
8181
; CHECK-NEXT: $sgpr30_sgpr31 = noconvergent G_SI_CALL [[GV]](p0), @external_gfx_void_func_struct_i8_i32, csr_amdgpu_si_gfx, implicit $vgpr0, implicit $vgpr1, implicit $sgpr0_sgpr1_sgpr2_sgpr3
8282
; CHECK-NEXT: ADJCALLSTACKDOWN 0, 0, implicit-def $scc
8383
; CHECK-NEXT: SI_RETURN
84-
%ptr0 = load ptr addrspace(1), ptr addrspace(4) undef
84+
%ptr0 = load ptr addrspace(1), ptr addrspace(4) poison
8585
%val = load { i8, i32 }, ptr addrspace(1) %ptr0
8686
call amdgpu_gfx void @external_gfx_void_func_struct_i8_i32({ i8, i32 } %val)
8787
ret void
@@ -91,7 +91,7 @@ define amdgpu_gfx void @test_gfx_call_external_void_func_struct_i8_i32_inreg() #
9191
; CHECK-LABEL: name: test_gfx_call_external_void_func_struct_i8_i32_inreg
9292
; CHECK: bb.1 (%ir-block.0):
9393
; CHECK-NEXT: [[DEF:%[0-9]+]]:_(p4) = G_IMPLICIT_DEF
94-
; CHECK-NEXT: [[LOAD:%[0-9]+]]:_(p1) = G_LOAD [[DEF]](p4) :: (invariant load (p1) from `ptr addrspace(4) undef`, addrspace 4)
94+
; CHECK-NEXT: [[LOAD:%[0-9]+]]:_(p1) = G_LOAD [[DEF]](p4) :: (invariant load (p1) from `ptr addrspace(4) poison`, addrspace 4)
9595
; CHECK-NEXT: [[LOAD1:%[0-9]+]]:_(s8) = G_LOAD [[LOAD]](p1) :: (load (s8) from %ir.ptr0, align 4, addrspace 1)
9696
; CHECK-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 4
9797
; CHECK-NEXT: [[PTR_ADD:%[0-9]+]]:_(p1) = G_PTR_ADD [[LOAD]], [[C]](s64)
@@ -109,7 +109,7 @@ define amdgpu_gfx void @test_gfx_call_external_void_func_struct_i8_i32_inreg() #
109109
; CHECK-NEXT: $sgpr30_sgpr31 = noconvergent G_SI_CALL [[GV]](p0), @external_gfx_void_func_struct_i8_i32_inreg, csr_amdgpu_si_gfx, implicit $sgpr4, implicit $sgpr5, implicit $sgpr0_sgpr1_sgpr2_sgpr3
110110
; CHECK-NEXT: ADJCALLSTACKDOWN 0, 0, implicit-def $scc
111111
; CHECK-NEXT: SI_RETURN
112-
%ptr0 = load ptr addrspace(1), ptr addrspace(4) undef
112+
%ptr0 = load ptr addrspace(1), ptr addrspace(4) poison
113113
%val = load { i8, i32 }, ptr addrspace(1) %ptr0
114114
call amdgpu_gfx void @external_gfx_void_func_struct_i8_i32_inreg({ i8, i32 } inreg %val)
115115
ret void

‎llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-call.ll‎

Lines changed: 28 additions & 28 deletions
Large diffs are not rendered by default.

‎llvm/test/CodeGen/AMDGPU/agpr-copy-no-free-registers.ll‎

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -826,7 +826,7 @@ define amdgpu_kernel void @introduced_copy_to_sgpr(i64 %arg, i32 %arg1, i32 %arg
826826
; GFX90A-NEXT: .LBB3_12: ; %DummyReturnBlock
827827
; GFX90A-NEXT: s_endpgm
828828
bb:
829-
%i = load volatile i16, ptr addrspace(4) undef, align 2
829+
%i = load volatile i16, ptr addrspace(4) poison, align 2
830830
%i6 = zext i16 %i to i64
831831
%i7 = udiv i32 %arg1, %arg2
832832
%i8 = zext i32 %i7 to i64

‎llvm/test/CodeGen/AMDGPU/attr-amdgpu-num-sgpr.ll‎

Lines changed: 11 additions & 11 deletions
Original file line numberDiff line numberDiff line change
@@ -7,17 +7,17 @@
77
; ALL: SGPRBlocks: 1
88
; ALL: NumSGPRsForWavesPerEU: 10
99
define amdgpu_kernel void @max_10_sgprs() #0 {
10-
%one = load volatile i32, ptr addrspace(4) undef
11-
%two = load volatile i32, ptr addrspace(4) undef
12-
%three = load volatile i32, ptr addrspace(4) undef
13-
%four = load volatile i32, ptr addrspace(4) undef
14-
%five = load volatile i32, ptr addrspace(4) undef
15-
%six = load volatile i32, ptr addrspace(4) undef
16-
%seven = load volatile i32, ptr addrspace(4) undef
17-
%eight = load volatile i32, ptr addrspace(4) undef
18-
%nine = load volatile i32, ptr addrspace(4) undef
19-
%ten = load volatile i32, ptr addrspace(4) undef
20-
%eleven = load volatile i32, ptr addrspace(4) undef
10+
%one = load volatile i32, ptr addrspace(4) poison
11+
%two = load volatile i32, ptr addrspace(4) poison
12+
%three = load volatile i32, ptr addrspace(4) poison
13+
%four = load volatile i32, ptr addrspace(4) poison
14+
%five = load volatile i32, ptr addrspace(4) poison
15+
%six = load volatile i32, ptr addrspace(4) poison
16+
%seven = load volatile i32, ptr addrspace(4) poison
17+
%eight = load volatile i32, ptr addrspace(4) poison
18+
%nine = load volatile i32, ptr addrspace(4) poison
19+
%ten = load volatile i32, ptr addrspace(4) poison
20+
%eleven = load volatile i32, ptr addrspace(4) poison
2121
call void asm sideeffect "", "s,s,s,s,s,s,s,s,s,s"(i32 %one, i32 %two, i32 %three, i32 %four, i32 %five, i32 %six, i32 %seven, i32 %eight, i32 %nine, i32 %ten)
2222
store volatile i32 %one, ptr addrspace(1) poison
2323
store volatile i32 %two, ptr addrspace(1) poison

‎llvm/test/CodeGen/AMDGPU/branch-relaxation.ll‎

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -959,7 +959,7 @@ bb0:
959959
br i1 %cmp0, label %bb2, label %bb1
960960

961961
bb1:
962-
%val = load volatile i32, ptr addrspace(4) undef
962+
%val = load volatile i32, ptr addrspace(4) poison
963963
%cmp1 = icmp eq i32 %val, 3
964964
br i1 %cmp1, label %bb3, label %bb2
965965

‎llvm/test/CodeGen/AMDGPU/bug-v4f64-subvector.ll‎

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -9,7 +9,7 @@
99
; CHECK: GLOBAL_STORE_DWORDX4
1010
define protected amdgpu_kernel void @test1() local_unnamed_addr !kernel_arg_addr_space !0 !kernel_arg_access_qual !1 !kernel_arg_type !2 !kernel_arg_base_type !2 !kernel_arg_type_qual !3 !kernel_arg_name !4 {
1111
entry:
12-
%tmp = load <3 x i64>, ptr addrspace(4) undef, align 16, !invariant.load !5
12+
%tmp = load <3 x i64>, ptr addrspace(4) poison, align 16, !invariant.load !5
1313
%srcA.load2 = extractelement <3 x i64> %tmp, i32 0
1414
%tmp1 = inttoptr i64 %srcA.load2 to ptr addrspace(1)
1515
%tmp2 = getelementptr inbounds double, ptr addrspace(1) %tmp1, i64 undef
@@ -36,7 +36,7 @@ entry:
3636
; CHECK: GLOBAL_STORE_DWORDX2
3737
define protected amdgpu_kernel void @test2() local_unnamed_addr !kernel_arg_addr_space !0 !kernel_arg_access_qual !1 !kernel_arg_type !2 !kernel_arg_base_type !2 !kernel_arg_type_qual !3 !kernel_arg_name !4 {
3838
entry:
39-
%tmp = load <3 x i64>, ptr addrspace(4) undef, align 16, !invariant.load !5
39+
%tmp = load <3 x i64>, ptr addrspace(4) poison, align 16, !invariant.load !5
4040
%srcA.load2 = extractelement <3 x i64> %tmp, i32 0
4141
%tmp1 = inttoptr i64 %srcA.load2 to ptr addrspace(1)
4242
%tmp2 = getelementptr inbounds double, ptr addrspace(1) %tmp1, i64 undef

‎llvm/test/CodeGen/AMDGPU/call-argument-types.ll‎

Lines changed: 6 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -3959,7 +3959,7 @@ define amdgpu_kernel void @test_call_external_void_func_v8i32() #0 {
39593959
; HSA-NEXT: s_mov_b32 s32, 0
39603960
; HSA-NEXT: s_swappc_b64 s[30:31], s[8:9]
39613961
; HSA-NEXT: s_endpgm
3962-
%ptr = load ptr addrspace(1), ptr addrspace(4) undef
3962+
%ptr = load ptr addrspace(1), ptr addrspace(4) poison
39633963
%val = load <8 x i32>, ptr addrspace(1) %ptr
39643964
call void @external_void_func_v8i32(<8 x i32> %val)
39653965
ret void
@@ -4204,7 +4204,7 @@ define amdgpu_kernel void @test_call_external_void_func_v16i32() #0 {
42044204
; HSA-NEXT: s_mov_b32 s32, 0
42054205
; HSA-NEXT: s_swappc_b64 s[30:31], s[8:9]
42064206
; HSA-NEXT: s_endpgm
4207-
%ptr = load ptr addrspace(1), ptr addrspace(4) undef
4207+
%ptr = load ptr addrspace(1), ptr addrspace(4) poison
42084208
%val = load <16 x i32>, ptr addrspace(1) %ptr
42094209
call void @external_void_func_v16i32(<16 x i32> %val)
42104210
ret void
@@ -4360,7 +4360,7 @@ define amdgpu_kernel void @test_call_external_void_func_v32i32() #0 {
43604360
; HSA-NEXT: buffer_store_dword v31, off, s[0:3], s32
43614361
; HSA-NEXT: s_swappc_b64 s[30:31], s[12:13]
43624362
; HSA-NEXT: s_endpgm
4363-
%ptr = load ptr addrspace(1), ptr addrspace(4) undef
4363+
%ptr = load ptr addrspace(1), ptr addrspace(4) poison
43644364
%val = load <32 x i32>, ptr addrspace(1) %ptr
43654365
call void @external_void_func_v32i32(<32 x i32> %val)
43664366
ret void
@@ -4532,7 +4532,7 @@ define amdgpu_kernel void @test_call_external_void_func_v32i32_i32(i32) #0 {
45324532
; HSA-NEXT: buffer_store_dword v31, off, s[0:3], s32
45334533
; HSA-NEXT: s_swappc_b64 s[30:31], s[8:9]
45344534
; HSA-NEXT: s_endpgm
4535-
%ptr0 = load ptr addrspace(1), ptr addrspace(4) undef
4535+
%ptr0 = load ptr addrspace(1), ptr addrspace(4) poison
45364536
%val0 = load <32 x i32>, ptr addrspace(1) %ptr0
45374537
%val1 = load i32, ptr addrspace(1) poison
45384538
call void @external_void_func_v32i32_i32(<32 x i32> %val0, i32 %val1)
@@ -4763,7 +4763,7 @@ define amdgpu_kernel void @test_call_external_void_func_struct_i8_i32() #0 {
47634763
; HSA-NEXT: s_mov_b32 s32, 0
47644764
; HSA-NEXT: s_swappc_b64 s[30:31], s[8:9]
47654765
; HSA-NEXT: s_endpgm
4766-
%ptr0 = load ptr addrspace(1), ptr addrspace(4) undef
4766+
%ptr0 = load ptr addrspace(1), ptr addrspace(4) poison
47674767
%val = load { i8, i32 }, ptr addrspace(1) %ptr0
47684768
call void @external_void_func_struct_i8_i32({ i8, i32 } %val)
47694769
ret void
@@ -5300,7 +5300,7 @@ define amdgpu_kernel void @test_call_external_void_func_v16i8() #0 {
53005300
; HSA-NEXT: v_mov_b32_e32 v3, v18
53015301
; HSA-NEXT: s_swappc_b64 s[30:31], s[8:9]
53025302
; HSA-NEXT: s_endpgm
5303-
%ptr = load ptr addrspace(1), ptr addrspace(4) undef
5303+
%ptr = load ptr addrspace(1), ptr addrspace(4) poison
53045304
%val = load <16 x i8>, ptr addrspace(1) %ptr
53055305
call void @external_void_func_v16i8(<16 x i8> %val)
53065306
ret void

‎llvm/test/CodeGen/AMDGPU/clamp-omod-special-case.mir‎

Lines changed: 12 additions & 12 deletions
Original file line numberDiff line numberDiff line change
@@ -43,8 +43,8 @@ body: |
4343
4444
%3 = COPY $vgpr0
4545
%0 = COPY $sgpr0_sgpr1
46-
%4 = S_LOAD_DWORDX2_IMM %0, 9, 0 :: (non-temporal dereferenceable invariant load (s64) from `ptr addrspace(4) undef`)
47-
%5 = S_LOAD_DWORDX2_IMM %0, 11, 0 :: (non-temporal dereferenceable invariant load (s64) from `ptr addrspace(4) undef`)
46+
%4 = S_LOAD_DWORDX2_IMM %0, 9, 0 :: (non-temporal dereferenceable invariant load (s64) from `ptr addrspace(4) poison`)
47+
%5 = S_LOAD_DWORDX2_IMM %0, 11, 0 :: (non-temporal dereferenceable invariant load (s64) from `ptr addrspace(4) poison`)
4848
%24 = V_ASHRREV_I32_e32 31, %3, implicit $exec
4949
%25 = REG_SEQUENCE %3, 1, %24, 2
5050
%10 = S_MOV_B32 61440
@@ -105,8 +105,8 @@ body: |
105105
106106
%3 = COPY $vgpr0
107107
%0 = COPY $sgpr0_sgpr1
108-
%4 = S_LOAD_DWORDX2_IMM %0, 9, 0 :: (non-temporal dereferenceable invariant load (s64) from `ptr addrspace(4) undef`)
109-
%5 = S_LOAD_DWORDX2_IMM %0, 11, 0 :: (non-temporal dereferenceable invariant load (s64) from `ptr addrspace(4) undef`)
108+
%4 = S_LOAD_DWORDX2_IMM %0, 9, 0 :: (non-temporal dereferenceable invariant load (s64) from `ptr addrspace(4) poison`)
109+
%5 = S_LOAD_DWORDX2_IMM %0, 11, 0 :: (non-temporal dereferenceable invariant load (s64) from `ptr addrspace(4) poison`)
110110
%24 = V_ASHRREV_I32_e32 31, %3, implicit $exec
111111
%25 = REG_SEQUENCE %3, 1, %24, 2
112112
%10 = S_MOV_B32 61440
@@ -168,8 +168,8 @@ body: |
168168
169169
%3 = COPY $vgpr0
170170
%0 = COPY $sgpr0_sgpr1
171-
%4 = S_LOAD_DWORDX2_IMM %0, 9, 0 :: (non-temporal dereferenceable invariant load (s64) from `ptr addrspace(4) undef`)
172-
%5 = S_LOAD_DWORDX2_IMM %0, 11, 0 :: (non-temporal dereferenceable invariant load (s64) from `ptr addrspace(4) undef`)
171+
%4 = S_LOAD_DWORDX2_IMM %0, 9, 0 :: (non-temporal dereferenceable invariant load (s64) from `ptr addrspace(4) poison`)
172+
%5 = S_LOAD_DWORDX2_IMM %0, 11, 0 :: (non-temporal dereferenceable invariant load (s64) from `ptr addrspace(4) poison`)
173173
%24 = V_ASHRREV_I32_e32 31, %3, implicit $exec
174174
%25 = REG_SEQUENCE %3, 1, %24, 2
175175
%10 = S_MOV_B32 61440
@@ -233,8 +233,8 @@ body: |
233233
234234
%3 = COPY $vgpr0
235235
%0 = COPY $sgpr0_sgpr1
236-
%4 = S_LOAD_DWORDX2_IMM %0, 9, 0 :: (non-temporal dereferenceable invariant load (s64) from `ptr addrspace(4) undef`)
237-
%5 = S_LOAD_DWORDX2_IMM %0, 11, 0 :: (non-temporal dereferenceable invariant load (s64) from `ptr addrspace(4) undef`)
236+
%4 = S_LOAD_DWORDX2_IMM %0, 9, 0 :: (non-temporal dereferenceable invariant load (s64) from `ptr addrspace(4) poison`)
237+
%5 = S_LOAD_DWORDX2_IMM %0, 11, 0 :: (non-temporal dereferenceable invariant load (s64) from `ptr addrspace(4) poison`)
238238
%24 = V_ASHRREV_I32_e32 31, %3, implicit $exec
239239
%25 = REG_SEQUENCE %3, 1, %24, 2
240240
%10 = S_MOV_B32 61440
@@ -310,8 +310,8 @@ body: |
310310
311311
%3 = COPY $vgpr0
312312
%0 = COPY $sgpr0_sgpr1
313-
%4 = S_LOAD_DWORDX2_IMM %0, 9, 0 :: (non-temporal dereferenceable invariant load (s64) from `ptr addrspace(4) undef`)
314-
%5 = S_LOAD_DWORDX2_IMM %0, 11, 0 :: (non-temporal dereferenceable invariant load (s64) from `ptr addrspace(4) undef`)
313+
%4 = S_LOAD_DWORDX2_IMM %0, 9, 0 :: (non-temporal dereferenceable invariant load (s64) from `ptr addrspace(4) poison`)
314+
%5 = S_LOAD_DWORDX2_IMM %0, 11, 0 :: (non-temporal dereferenceable invariant load (s64) from `ptr addrspace(4) poison`)
315315
%24 = V_ASHRREV_I32_e32 31, %3, implicit $exec
316316
%25 = REG_SEQUENCE %3, 1, %24, 2
317317
%10 = S_MOV_B32 61440
@@ -375,8 +375,8 @@ body: |
375375
376376
%3 = COPY $vgpr0
377377
%0 = COPY $sgpr0_sgpr1
378-
%4 = S_LOAD_DWORDX2_IMM %0, 9, 0 :: (non-temporal dereferenceable invariant load (s64) from `ptr addrspace(4) undef`)
379-
%5 = S_LOAD_DWORDX2_IMM %0, 11, 0 :: (non-temporal dereferenceable invariant load (s64) from `ptr addrspace(4) undef`)
378+
%4 = S_LOAD_DWORDX2_IMM %0, 9, 0 :: (non-temporal dereferenceable invariant load (s64) from `ptr addrspace(4) poison`)
379+
%5 = S_LOAD_DWORDX2_IMM %0, 11, 0 :: (non-temporal dereferenceable invariant load (s64) from `ptr addrspace(4) poison`)
380380
%24 = V_ASHRREV_I32_e32 31, %3, implicit $exec
381381
%25 = REG_SEQUENCE %3, 1, %24, 2
382382
%10 = S_MOV_B32 61440

‎llvm/test/CodeGen/AMDGPU/constant-fold-imm-immreg.mir‎

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -724,7 +724,7 @@ body: |
724724
725725
%2:vgpr_32 = COPY $vgpr0
726726
%0:sgpr_64 = COPY $sgpr0_sgpr1
727-
%3:sreg_64_xexec = S_LOAD_DWORDX2_IMM %0, 36, 0 :: (non-temporal dereferenceable invariant load (s64) from `ptr addrspace(4) undef`, addrspace 4)
727+
%3:sreg_64_xexec = S_LOAD_DWORDX2_IMM %0, 36, 0 :: (non-temporal dereferenceable invariant load (s64) from `ptr addrspace(4) poison`, addrspace 4)
728728
%15:vgpr_32 = V_ASHRREV_I32_e64 31, %2, implicit $exec
729729
%16:vreg_64 = REG_SEQUENCE %2, %subreg.sub0, %15, %subreg.sub1
730730
%17:vreg_64 = V_LSHLREV_B64_e64 2, killed %16, implicit $exec

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