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‎llvm/lib/Target/PowerPC/PPCInstr64Bit.td‎

Lines changed: 55 additions & 55 deletions
Original file line numberDiff line numberDiff line change
@@ -693,66 +693,66 @@ def ADD8TLS : XOForm_1<31, 266, 0, (outs g8rc:$RT), (ins g8rc_nox0:$RA, tlsreg:
693693
"add $RT, $RA, $RB", IIC_IntSimple,
694694
[(set i64:$RT, (add i64:$RA, tglobaltlsaddr:$RB))]>;
695695
let mayLoad = 1 in {
696-
def LBZXTLS : XForm_1<31, 87, (outs g8rc:$RST), (ins PtrOpNoR0:$RA, tlsreg:$RB),
696+
def LBZXTLS : XForm_1<31, 87, (outs g8rc:$RST), (ins ptr_rc_nor0:$RA, tlsreg:$RB),
697697
"lbzx $RST, $RA, $RB", IIC_LdStLoad, []>;
698-
def LHZXTLS : XForm_1<31, 279, (outs g8rc:$RST), (ins PtrOpNoR0:$RA, tlsreg:$RB),
698+
def LHZXTLS : XForm_1<31, 279, (outs g8rc:$RST), (ins ptr_rc_nor0:$RA, tlsreg:$RB),
699699
"lhzx $RST, $RA, $RB", IIC_LdStLoad, []>;
700-
def LHAXTLS : XForm_1<31, 343, (outs g8rc:$RST), (ins PtrOpNoR0:$RA, tlsreg:$RB),
700+
def LHAXTLS : XForm_1<31, 343, (outs g8rc:$RST), (ins ptr_rc_nor0:$RA, tlsreg:$RB),
701701
"lhax $RST, $RA, $RB", IIC_LdStLoad, []>;
702-
def LWZXTLS : XForm_1<31, 23, (outs g8rc:$RST), (ins PtrOpNoR0:$RA, tlsreg:$RB),
702+
def LWZXTLS : XForm_1<31, 23, (outs g8rc:$RST), (ins ptr_rc_nor0:$RA, tlsreg:$RB),
703703
"lwzx $RST, $RA, $RB", IIC_LdStLoad, []>;
704-
def LWAXTLS : XForm_1<31, 341, (outs g8rc:$RST), (ins PtrOpNoR0:$RA, tlsreg:$RB),
704+
def LWAXTLS : XForm_1<31, 341, (outs g8rc:$RST), (ins ptr_rc_nor0:$RA, tlsreg:$RB),
705705
"lwax $RST, $RA, $RB", IIC_LdStLoad, []>;
706-
def LDXTLS : XForm_1<31, 21, (outs g8rc:$RST), (ins PtrOpNoR0:$RA, tlsreg:$RB),
706+
def LDXTLS : XForm_1<31, 21, (outs g8rc:$RST), (ins ptr_rc_nor0:$RA, tlsreg:$RB),
707707
"ldx $RST, $RA, $RB", IIC_LdStLD, []>, isPPC64;
708-
def LBZXTLS_32 : XForm_1<31, 87, (outs gprc:$RST), (ins PtrOpNoR0:$RA, tlsreg:$RB),
708+
def LBZXTLS_32 : XForm_1<31, 87, (outs gprc:$RST), (ins ptr_rc_nor0:$RA, tlsreg:$RB),
709709
"lbzx $RST, $RA, $RB", IIC_LdStLoad, []>;
710-
def LHZXTLS_32 : XForm_1<31, 279, (outs gprc:$RST), (ins PtrOpNoR0:$RA, tlsreg:$RB),
710+
def LHZXTLS_32 : XForm_1<31, 279, (outs gprc:$RST), (ins ptr_rc_nor0:$RA, tlsreg:$RB),
711711
"lhzx $RST, $RA, $RB", IIC_LdStLoad, []>;
712-
def LHAXTLS_32 : XForm_1<31, 343, (outs gprc:$RST), (ins PtrOpNoR0:$RA, tlsreg:$RB),
712+
def LHAXTLS_32 : XForm_1<31, 343, (outs gprc:$RST), (ins ptr_rc_nor0:$RA, tlsreg:$RB),
713713
"lhax $RST, $RA, $RB", IIC_LdStLoad, []>;
714-
def LWZXTLS_32 : XForm_1<31, 23, (outs gprc:$RST), (ins PtrOpNoR0:$RA, tlsreg:$RB),
714+
def LWZXTLS_32 : XForm_1<31, 23, (outs gprc:$RST), (ins ptr_rc_nor0:$RA, tlsreg:$RB),
715715
"lwzx $RST, $RA, $RB", IIC_LdStLoad, []>;
716-
def LWAXTLS_32 : XForm_1<31, 341, (outs gprc:$RST), (ins PtrOpNoR0:$RA, tlsreg:$RB),
716+
def LWAXTLS_32 : XForm_1<31, 341, (outs gprc:$RST), (ins ptr_rc_nor0:$RA, tlsreg:$RB),
717717
"lwax $RST, $RA, $RB", IIC_LdStLoad, []>;
718718

719719
}
720720
let mayLoad = 1, Predicates = [HasFPU] in {
721-
def LFSXTLS : XForm_25<31, 535, (outs f4rc:$RST), (ins PtrOpNoR0:$RA, tlsreg:$RB),
721+
def LFSXTLS : XForm_25<31, 535, (outs f4rc:$RST), (ins ptr_rc_nor0:$RA, tlsreg:$RB),
722722
"lfsx $RST, $RA, $RB", IIC_LdStLFD, []>;
723-
def LFDXTLS : XForm_25<31, 599, (outs f8rc:$RST), (ins PtrOpNoR0:$RA, tlsreg:$RB),
723+
def LFDXTLS : XForm_25<31, 599, (outs f8rc:$RST), (ins ptr_rc_nor0:$RA, tlsreg:$RB),
724724
"lfdx $RST, $RA, $RB", IIC_LdStLFD, []>;
725725
}
726726

727727
let mayStore = 1 in {
728-
def STBXTLS : XForm_8<31, 215, (outs), (ins g8rc:$RST, PtrOpNoR0:$RA, tlsreg:$RB),
728+
def STBXTLS : XForm_8<31, 215, (outs), (ins g8rc:$RST, ptr_rc_nor0:$RA, tlsreg:$RB),
729729
"stbx $RST, $RA, $RB", IIC_LdStStore, []>,
730730
PPC970_DGroup_Cracked;
731-
def STHXTLS : XForm_8<31, 407, (outs), (ins g8rc:$RST, PtrOpNoR0:$RA, tlsreg:$RB),
731+
def STHXTLS : XForm_8<31, 407, (outs), (ins g8rc:$RST, ptr_rc_nor0:$RA, tlsreg:$RB),
732732
"sthx $RST, $RA, $RB", IIC_LdStStore, []>,
733733
PPC970_DGroup_Cracked;
734-
def STWXTLS : XForm_8<31, 151, (outs), (ins g8rc:$RST, PtrOpNoR0:$RA, tlsreg:$RB),
734+
def STWXTLS : XForm_8<31, 151, (outs), (ins g8rc:$RST, ptr_rc_nor0:$RA, tlsreg:$RB),
735735
"stwx $RST, $RA, $RB", IIC_LdStStore, []>,
736736
PPC970_DGroup_Cracked;
737-
def STDXTLS : XForm_8<31, 149, (outs), (ins g8rc:$RST, PtrOpNoR0:$RA, tlsreg:$RB),
737+
def STDXTLS : XForm_8<31, 149, (outs), (ins g8rc:$RST, ptr_rc_nor0:$RA, tlsreg:$RB),
738738
"stdx $RST, $RA, $RB", IIC_LdStSTD, []>, isPPC64,
739739
PPC970_DGroup_Cracked;
740-
def STBXTLS_32 : XForm_8<31, 215, (outs), (ins gprc:$RST, PtrOpNoR0:$RA, tlsreg:$RB),
740+
def STBXTLS_32 : XForm_8<31, 215, (outs), (ins gprc:$RST, ptr_rc_nor0:$RA, tlsreg:$RB),
741741
"stbx $RST, $RA, $RB", IIC_LdStStore, []>,
742742
PPC970_DGroup_Cracked;
743-
def STHXTLS_32 : XForm_8<31, 407, (outs), (ins gprc:$RST, PtrOpNoR0:$RA, tlsreg:$RB),
743+
def STHXTLS_32 : XForm_8<31, 407, (outs), (ins gprc:$RST, ptr_rc_nor0:$RA, tlsreg:$RB),
744744
"sthx $RST, $RA, $RB", IIC_LdStStore, []>,
745745
PPC970_DGroup_Cracked;
746-
def STWXTLS_32 : XForm_8<31, 151, (outs), (ins gprc:$RST, PtrOpNoR0:$RA, tlsreg:$RB),
746+
def STWXTLS_32 : XForm_8<31, 151, (outs), (ins gprc:$RST, ptr_rc_nor0:$RA, tlsreg:$RB),
747747
"stwx $RST, $RA, $RB", IIC_LdStStore, []>,
748748
PPC970_DGroup_Cracked;
749749

750750
}
751751
let mayStore = 1, Predicates = [HasFPU] in {
752-
def STFSXTLS : XForm_8<31, 663, (outs), (ins f4rc:$RST, PtrOpNoR0:$RA, tlsreg:$RB),
752+
def STFSXTLS : XForm_8<31, 663, (outs), (ins f4rc:$RST, ptr_rc_nor0:$RA, tlsreg:$RB),
753753
"stfsx $RST, $RA, $RB", IIC_LdStSTFD, []>,
754754
PPC970_DGroup_Cracked;
755-
def STFDXTLS : XForm_8<31, 727, (outs), (ins f8rc:$RST, PtrOpNoR0:$RA, tlsreg:$RB),
755+
def STFDXTLS : XForm_8<31, 727, (outs), (ins f8rc:$RST, ptr_rc_nor0:$RA, tlsreg:$RB),
756756
"stfdx $RST, $RA, $RB", IIC_LdStSTFD, []>,
757757
PPC970_DGroup_Cracked;
758758
}
@@ -825,47 +825,47 @@ def ADD8TLS_ : XOForm_1<31, 266, 0, (outs g8rc:$RT), (ins g8rc:$RA, tlsreg:$RB),
825825
"add $RT, $RA, $RB", IIC_IntSimple, []>;
826826

827827
let mayLoad = 1 in {
828-
def LBZXTLS_ : XForm_1<31, 87, (outs g8rc:$RST), (ins PtrOpNoR0:$RA, tlsreg:$RB),
828+
def LBZXTLS_ : XForm_1<31, 87, (outs g8rc:$RST), (ins ptr_rc_nor0:$RA, tlsreg:$RB),
829829
"lbzx $RST, $RA, $RB", IIC_LdStLoad, []>;
830-
def LHZXTLS_ : XForm_1<31, 279, (outs g8rc:$RST), (ins PtrOpNoR0:$RA, tlsreg:$RB),
830+
def LHZXTLS_ : XForm_1<31, 279, (outs g8rc:$RST), (ins ptr_rc_nor0:$RA, tlsreg:$RB),
831831
"lhzx $RST, $RA, $RB", IIC_LdStLoad, []>;
832-
def LHAXTLS_ : XForm_1<31, 343, (outs g8rc:$RST), (ins PtrOpNoR0:$RA, tlsreg:$RB),
832+
def LHAXTLS_ : XForm_1<31, 343, (outs g8rc:$RST), (ins ptr_rc_nor0:$RA, tlsreg:$RB),
833833
"lhax $RST, $RA, $RB", IIC_LdStLoad, []>;
834-
def LWZXTLS_ : XForm_1<31, 23, (outs g8rc:$RST), (ins PtrOpNoR0:$RA, tlsreg:$RB),
834+
def LWZXTLS_ : XForm_1<31, 23, (outs g8rc:$RST), (ins ptr_rc_nor0:$RA, tlsreg:$RB),
835835
"lwzx $RST, $RA, $RB", IIC_LdStLoad, []>;
836-
def LWAXTLS_ : XForm_1<31, 341, (outs g8rc:$RST), (ins PtrOpNoR0:$RA, tlsreg:$RB),
836+
def LWAXTLS_ : XForm_1<31, 341, (outs g8rc:$RST), (ins ptr_rc_nor0:$RA, tlsreg:$RB),
837837
"lwax $RST, $RA, $RB", IIC_LdStLoad, []>;
838-
def LDXTLS_ : XForm_1<31, 21, (outs g8rc:$RST), (ins PtrOpNoR0:$RA, tlsreg:$RB),
838+
def LDXTLS_ : XForm_1<31, 21, (outs g8rc:$RST), (ins ptr_rc_nor0:$RA, tlsreg:$RB),
839839
"ldx $RST, $RA, $RB", IIC_LdStLD, []>, isPPC64;
840840
}
841841

842842
let mayLoad = 1, Predicates = [HasFPU] in {
843-
def LFSXTLS_ : XForm_25<31, 535, (outs f4rc:$RST), (ins PtrOpNoR0:$RA, tlsreg:$RB),
843+
def LFSXTLS_ : XForm_25<31, 535, (outs f4rc:$RST), (ins ptr_rc_nor0:$RA, tlsreg:$RB),
844844
"lfsx $RST, $RA, $RB", IIC_LdStLFD, []>;
845-
def LFDXTLS_ : XForm_25<31, 599, (outs f8rc:$RST), (ins PtrOpNoR0:$RA, tlsreg:$RB),
845+
def LFDXTLS_ : XForm_25<31, 599, (outs f8rc:$RST), (ins ptr_rc_nor0:$RA, tlsreg:$RB),
846846
"lfdx $RST, $RA, $RB", IIC_LdStLFD, []>;
847847
}
848848

849849
let mayStore = 1 in {
850-
def STBXTLS_ : XForm_8<31, 215, (outs), (ins g8rc:$RST, PtrOpNoR0:$RA, tlsreg:$RB),
850+
def STBXTLS_ : XForm_8<31, 215, (outs), (ins g8rc:$RST, ptr_rc_nor0:$RA, tlsreg:$RB),
851851
"stbx $RST, $RA, $RB", IIC_LdStStore, []>,
852852
PPC970_DGroup_Cracked;
853-
def STHXTLS_ : XForm_8<31, 407, (outs), (ins g8rc:$RST, PtrOpNoR0:$RA, tlsreg:$RB),
853+
def STHXTLS_ : XForm_8<31, 407, (outs), (ins g8rc:$RST, ptr_rc_nor0:$RA, tlsreg:$RB),
854854
"sthx $RST, $RA, $RB", IIC_LdStStore, []>,
855855
PPC970_DGroup_Cracked;
856-
def STWXTLS_ : XForm_8<31, 151, (outs), (ins g8rc:$RST, PtrOpNoR0:$RA, tlsreg:$RB),
856+
def STWXTLS_ : XForm_8<31, 151, (outs), (ins g8rc:$RST, ptr_rc_nor0:$RA, tlsreg:$RB),
857857
"stwx $RST, $RA, $RB", IIC_LdStStore, []>,
858858
PPC970_DGroup_Cracked;
859-
def STDXTLS_ : XForm_8<31, 149, (outs), (ins g8rc:$RST, PtrOpNoR0:$RA, tlsreg:$RB),
859+
def STDXTLS_ : XForm_8<31, 149, (outs), (ins g8rc:$RST, ptr_rc_nor0:$RA, tlsreg:$RB),
860860
"stdx $RST, $RA, $RB", IIC_LdStSTD, []>, isPPC64,
861861
PPC970_DGroup_Cracked;
862862
}
863863

864864
let mayStore = 1, Predicates = [HasFPU] in {
865-
def STFSXTLS_ : XForm_8<31, 663, (outs), (ins f4rc:$RST, PtrOpNoR0:$RA, tlsreg:$RB),
865+
def STFSXTLS_ : XForm_8<31, 663, (outs), (ins f4rc:$RST, ptr_rc_nor0:$RA, tlsreg:$RB),
866866
"stfsx $RST, $RA, $RB", IIC_LdStSTFD, []>,
867867
PPC970_DGroup_Cracked;
868-
def STFDXTLS_ : XForm_8<31, 727, (outs), (ins f8rc:$RST, PtrOpNoR0:$RA, tlsreg:$RB),
868+
def STFDXTLS_ : XForm_8<31, 727, (outs), (ins f8rc:$RST, ptr_rc_nor0:$RA, tlsreg:$RB),
869869
"stfdx $RST, $RA, $RB", IIC_LdStSTFD, []>,
870870
PPC970_DGroup_Cracked;
871871
}
@@ -1309,18 +1309,18 @@ def LWAX_32 : XForm_1_memOp<31, 341, (outs gprc:$RST), (ins (memrr $RA, $RB):$ad
13091309
// Update forms.
13101310
let mayLoad = 1, hasSideEffects = 0 in {
13111311
let Interpretation64Bit = 1, isCodeGenOnly = 1 in
1312-
def LHAU8 : DForm_1<43, (outs g8rc:$RST, PtrOpNoR0:$ea_result),
1312+
def LHAU8 : DForm_1<43, (outs g8rc:$RST, ptr_rc_nor0:$ea_result),
13131313
(ins (memri $D, $RA):$addr),
13141314
"lhau $RST, $addr", IIC_LdStLHAU,
13151315
[]>, RegConstraint<"$addr.reg = $ea_result">;
13161316
// NO LWAU!
13171317

13181318
let Interpretation64Bit = 1, isCodeGenOnly = 1 in
1319-
def LHAUX8 : XForm_1_memOp<31, 375, (outs g8rc:$RST, PtrOpNoR0:$ea_result),
1319+
def LHAUX8 : XForm_1_memOp<31, 375, (outs g8rc:$RST, ptr_rc_nor0:$ea_result),
13201320
(ins (memrr $RA, $RB):$addr),
13211321
"lhaux $RST, $addr", IIC_LdStLHAUX,
13221322
[]>, RegConstraint<"$addr.ptrreg = $ea_result">;
1323-
def LWAUX : XForm_1_memOp<31, 373, (outs g8rc:$RST, PtrOpNoR0:$ea_result),
1323+
def LWAUX : XForm_1_memOp<31, 373, (outs g8rc:$RST, ptr_rc_nor0:$ea_result),
13241324
(ins (memrr $RA, $RB):$addr),
13251325
"lwaux $RST, $addr", IIC_LdStLHAUX,
13261326
[]>, RegConstraint<"$addr.ptrreg = $ea_result">, isPPC64;
@@ -1359,28 +1359,28 @@ def LWZX8 : XForm_1_memOp<31, 23, (outs g8rc:$RST), (ins (memrr $RA, $RB):$addr
13591359

13601360
// Update forms.
13611361
let mayLoad = 1, hasSideEffects = 0 in {
1362-
def LBZU8 : DForm_1<35, (outs g8rc:$RST, PtrOpNoR0:$ea_result),
1362+
def LBZU8 : DForm_1<35, (outs g8rc:$RST, ptr_rc_nor0:$ea_result),
13631363
(ins (memri $D, $RA):$addr),
13641364
"lbzu $RST, $addr", IIC_LdStLoadUpd,
13651365
[]>, RegConstraint<"$addr.reg = $ea_result">;
1366-
def LHZU8 : DForm_1<41, (outs g8rc:$RST, PtrOpNoR0:$ea_result),
1366+
def LHZU8 : DForm_1<41, (outs g8rc:$RST, ptr_rc_nor0:$ea_result),
13671367
(ins (memri $D, $RA):$addr),
13681368
"lhzu $RST, $addr", IIC_LdStLoadUpd,
13691369
[]>, RegConstraint<"$addr.reg = $ea_result">;
1370-
def LWZU8 : DForm_1<33, (outs g8rc:$RST, PtrOpNoR0:$ea_result),
1370+
def LWZU8 : DForm_1<33, (outs g8rc:$RST, ptr_rc_nor0:$ea_result),
13711371
(ins (memri $D, $RA):$addr),
13721372
"lwzu $RST, $addr", IIC_LdStLoadUpd,
13731373
[]>, RegConstraint<"$addr.reg = $ea_result">;
13741374

1375-
def LBZUX8 : XForm_1_memOp<31, 119, (outs g8rc:$RST, PtrOpNoR0:$ea_result),
1375+
def LBZUX8 : XForm_1_memOp<31, 119, (outs g8rc:$RST, ptr_rc_nor0:$ea_result),
13761376
(ins (memrr $RA, $RB):$addr),
13771377
"lbzux $RST, $addr", IIC_LdStLoadUpdX,
13781378
[]>, RegConstraint<"$addr.ptrreg = $ea_result">;
1379-
def LHZUX8 : XForm_1_memOp<31, 311, (outs g8rc:$RST, PtrOpNoR0:$ea_result),
1379+
def LHZUX8 : XForm_1_memOp<31, 311, (outs g8rc:$RST, ptr_rc_nor0:$ea_result),
13801380
(ins (memrr $RA, $RB):$addr),
13811381
"lhzux $RST, $addr", IIC_LdStLoadUpdX,
13821382
[]>, RegConstraint<"$addr.ptrreg = $ea_result">;
1383-
def LWZUX8 : XForm_1_memOp<31, 55, (outs g8rc:$RST, PtrOpNoR0:$ea_result),
1383+
def LWZUX8 : XForm_1_memOp<31, 55, (outs g8rc:$RST, ptr_rc_nor0:$ea_result),
13841384
(ins (memrr $RA, $RB):$addr),
13851385
"lwzux $RST, $addr", IIC_LdStLoadUpdX,
13861386
[]>, RegConstraint<"$addr.ptrreg = $ea_result">;
@@ -1432,12 +1432,12 @@ def LWBRX8 : XForm_1_memOp<31, 534, (outs g8rc:$RST), (ins (memrr $RA, $RB):$ad
14321432
}
14331433

14341434
let mayLoad = 1, hasSideEffects = 0 in {
1435-
def LDU : DSForm_1<58, 1, (outs g8rc:$RST, PtrOpNoR0:$ea_result),
1435+
def LDU : DSForm_1<58, 1, (outs g8rc:$RST, ptr_rc_nor0:$ea_result),
14361436
(ins (memrix $D, $RA):$addr),
14371437
"ldu $RST, $addr", IIC_LdStLDU,
14381438
[]>, RegConstraint<"$addr.reg = $ea_result">, isPPC64;
14391439

1440-
def LDUX : XForm_1_memOp<31, 53, (outs g8rc:$RST, PtrOpNoR0:$ea_result),
1440+
def LDUX : XForm_1_memOp<31, 53, (outs g8rc:$RST, ptr_rc_nor0:$ea_result),
14411441
(ins (memrr $RA, $RB):$addr),
14421442
"ldux $RST, $addr", IIC_LdStLDUX,
14431443
[]>, RegConstraint<"$addr.ptrreg = $ea_result">, isPPC64;
@@ -1704,40 +1704,40 @@ def : Pat<(int_ppc_atomic_store_i128 i64:$lo, i64:$hi, ForceXForm:$dst),
17041704
// Stores with Update (pre-inc).
17051705
let PPC970_Unit = 2, mayStore = 1, mayLoad = 0 in {
17061706
let Interpretation64Bit = 1, isCodeGenOnly = 1 in {
1707-
def STBU8 : DForm_1<39, (outs PtrOpNoR0:$ea_res), (ins g8rc:$RST, (memri $D, $RA):$addr),
1707+
def STBU8 : DForm_1<39, (outs ptr_rc_nor0:$ea_res), (ins g8rc:$RST, (memri $D, $RA):$addr),
17081708
"stbu $RST, $addr", IIC_LdStSTU, []>,
17091709
RegConstraint<"$addr.reg = $ea_res">;
1710-
def STHU8 : DForm_1<45, (outs PtrOpNoR0:$ea_res), (ins g8rc:$RST, (memri $D, $RA):$addr),
1710+
def STHU8 : DForm_1<45, (outs ptr_rc_nor0:$ea_res), (ins g8rc:$RST, (memri $D, $RA):$addr),
17111711
"sthu $RST, $addr", IIC_LdStSTU, []>,
17121712
RegConstraint<"$addr.reg = $ea_res">;
1713-
def STWU8 : DForm_1<37, (outs PtrOpNoR0:$ea_res), (ins g8rc:$RST, (memri $D, $RA):$addr),
1713+
def STWU8 : DForm_1<37, (outs ptr_rc_nor0:$ea_res), (ins g8rc:$RST, (memri $D, $RA):$addr),
17141714
"stwu $RST, $addr", IIC_LdStSTU, []>,
17151715
RegConstraint<"$addr.reg = $ea_res">;
17161716

1717-
def STBUX8: XForm_8_memOp<31, 247, (outs PtrOpNoR0:$ea_res),
1717+
def STBUX8: XForm_8_memOp<31, 247, (outs ptr_rc_nor0:$ea_res),
17181718
(ins g8rc:$RST, (memrr $RA, $RB):$addr),
17191719
"stbux $RST, $addr", IIC_LdStSTUX, []>,
17201720
RegConstraint<"$addr.ptrreg = $ea_res">,
17211721
PPC970_DGroup_Cracked;
1722-
def STHUX8: XForm_8_memOp<31, 439, (outs PtrOpNoR0:$ea_res),
1722+
def STHUX8: XForm_8_memOp<31, 439, (outs ptr_rc_nor0:$ea_res),
17231723
(ins g8rc:$RST, (memrr $RA, $RB):$addr),
17241724
"sthux $RST, $addr", IIC_LdStSTUX, []>,
17251725
RegConstraint<"$addr.ptrreg = $ea_res">,
17261726
PPC970_DGroup_Cracked;
1727-
def STWUX8: XForm_8_memOp<31, 183, (outs PtrOpNoR0:$ea_res),
1727+
def STWUX8: XForm_8_memOp<31, 183, (outs ptr_rc_nor0:$ea_res),
17281728
(ins g8rc:$RST, (memrr $RA, $RB):$addr),
17291729
"stwux $RST, $addr", IIC_LdStSTUX, []>,
17301730
RegConstraint<"$addr.ptrreg = $ea_res">,
17311731
PPC970_DGroup_Cracked;
17321732
} // Interpretation64Bit
17331733

1734-
def STDU : DSForm_1<62, 1, (outs PtrOpNoR0:$ea_res),
1734+
def STDU : DSForm_1<62, 1, (outs ptr_rc_nor0:$ea_res),
17351735
(ins g8rc:$RST, (memrix $D, $RA):$addr),
17361736
"stdu $RST, $addr", IIC_LdStSTU, []>,
17371737
RegConstraint<"$addr.reg = $ea_res">,
17381738
isPPC64;
17391739

1740-
def STDUX : XForm_8_memOp<31, 181, (outs PtrOpNoR0:$ea_res),
1740+
def STDUX : XForm_8_memOp<31, 181, (outs ptr_rc_nor0:$ea_res),
17411741
(ins g8rc:$RST, (memrr $RA, $RB):$addr),
17421742
"stdux $RST, $addr", IIC_LdStSTUX, []>,
17431743
RegConstraint<"$addr.ptrreg = $ea_res">,

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