[test] Change llc -march=mips* to -mtriple=mips*

Similar to 806761a

Author: MaskRay

llvm/test/CodeGen/MIR/Mips/expected-global-value-or-symbol-after-call-entry.mir

@@ -1,4 +1,4 @@
-# RUN: not llc -march=mipsel -mattr=mips16 -relocation-model=pic -run-pass none -o /dev/null %s 2>&1 | FileCheck %s
+# RUN: not llc -mtriple=mipsel -mattr=mips16 -relocation-model=pic -run-pass none -o /dev/null %s 2>&1 | FileCheck %s
 --- |
   define i32 @test(i32 %a) {
   entry:

llvm/test/CodeGen/MIR/Mips/memory-operands.mir

@@ -1,4 +1,4 @@
-# RUN: llc -march=mipsel -mattr=mips16 -relocation-model=pic -run-pass none -o - %s | FileCheck %s
+# RUN: llc -mtriple=mipsel -mattr=mips16 -relocation-model=pic -run-pass none -o - %s | FileCheck %s
 # This test ensures that the MIR parser parses the call entry pseudo source
 # values in memory operands correctly.
 

llvm/test/CodeGen/Mips/2008-06-05-Carry.ll

@@ -1,4 +1,4 @@
-; RUN: llc -march=mips < %s | FileCheck %s
+; RUN: llc -mtriple=mips < %s | FileCheck %s
 
 define i64 @add64(i64 %u, i64 %v) nounwind  {
 entry:

llvm/test/CodeGen/Mips/2008-07-03-SRet.ll

@@ -1,4 +1,4 @@
-; RUN: llc -march=mips < %s | FileCheck %s
+; RUN: llc -mtriple=mips < %s | FileCheck %s
 
 %struct.sret0 = type { i32, i32, i32 }
 

llvm/test/CodeGen/Mips/2008-07-07-FPExtend.ll

@@ -1,4 +1,4 @@
-; RUN: llc -march=mips -mattr=single-float  < %s | FileCheck %s
+; RUN: llc -mtriple=mips -mattr=single-float  < %s | FileCheck %s
 
 define double @dofloat(float %a) nounwind {
 entry:

llvm/test/CodeGen/Mips/2008-07-07-IntDoubleConvertions.ll

@@ -1,4 +1,4 @@
-; RUN: llc -march=mips -mattr=single-float  < %s | FileCheck %s
+; RUN: llc -mtriple=mips -mattr=single-float  < %s | FileCheck %s
 
 define double @int2fp(i32 %a) nounwind {
 entry:

llvm/test/CodeGen/Mips/2008-07-16-SignExtInReg.ll

@@ -1,5 +1,5 @@
-; RUN: llc < %s -march=mips -mcpu=mips32r2 | FileCheck %s
-; RUN: llc < %s -march=mips64 -mcpu=mips64r2 | FileCheck %s
+; RUN: llc < %s -mtriple=mips -mcpu=mips32r2 | FileCheck %s
+; RUN: llc < %s -mtriple=mips64 -mcpu=mips64r2 | FileCheck %s
 ; RUN: llc -mtriple=mipsel-linux-gnu -march=mipsel -mcpu=mips32r2 -mattr=+mips16 < %s | FileCheck %s
 
 define signext i8 @A(i8 %e.0, i8 signext %sum)  nounwind {

llvm/test/CodeGen/Mips/2008-07-23-fpcmp.ll

@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=mips -o %t
+; RUN: llc < %s -mtriple=mips -o %t
 ; RUN: grep "c\..*\.s" %t | count 3
 ; RUN: grep "bc1[tf]" %t | count 3
 

llvm/test/CodeGen/Mips/2008-07-29-icmp.ll

@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=mips | grep "b[ne][eq]" | count 1
+; RUN: llc < %s -mtriple=mips | grep "b[ne][eq]" | count 1
 
 ; FIXME: Disabled because branch instructions are generated where
 ; conditional move instructions are expected.

llvm/test/CodeGen/Mips/2008-07-31-fcopysign.ll

@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=mips -o %t
+; RUN: llc < %s -mtriple=mips -o %t
 ; RUN: grep abs.s  %t | count 1
 ; RUN: grep neg.s %t | count 1