Use addp instead of ext + add

Author: sdesmalen-arm

llvm/lib/Target/AArch64/AArch64ISelLowering.cpp

@@ -30776,9 +30776,8 @@ AArch64TargetLowering::LowerPARTIAL_REDUCE_MLA(SDValue Op,
     SDValue WideAcc = DAG.getInsertSubvector(DL, ZeroVec, Acc, 0);
     SDValue Wide = DAG.getNode(Op.getOpcode(), DL, MVT::v4i32,
                                WideAcc, LHS, RHS);
-    SDValue Lo = DAG.getExtractSubvector(DL, MVT::v2i32, Wide, 0);
-    SDValue Hi = DAG.getExtractSubvector(DL, MVT::v2i32, Wide, 2);
-    return DAG.getNode(ISD::ADD, DL, ResultVT, Lo, Hi);
+    SDValue Reduced = DAG.getNode(AArch64ISD::ADDP, DL, MVT::v4i32, Wide, Wide);
+    return DAG.getExtractSubvector(DL, MVT::v2i32, Reduced, 0);
   }
 
   if (ConvertToScalable) {

llvm/test/CodeGen/AArch64/neon-partial-reduce-dot-product.ll

@@ -1483,17 +1483,17 @@ define <2 x i32> @udot_v16i8tov2i32(<2 x i32> %acc, <16 x i8> %input) {
 ; CHECK-DOT-NEXT:    movi v2.16b, #1
 ; CHECK-DOT-NEXT:    fmov d0, d0
 ; CHECK-DOT-NEXT:    udot v0.4s, v1.16b, v2.16b
-; CHECK-DOT-NEXT:    ext v1.16b, v0.16b, v0.16b, #8
-; CHECK-DOT-NEXT:    add v0.2s, v0.2s, v1.2s
+; CHECK-DOT-NEXT:    addp v0.4s, v0.4s, v0.4s
+; CHECK-DOT-NEXT:    // kill: def $d0 killed $d0 killed $q0
 ; CHECK-DOT-NEXT:    ret
 ;
 ; CHECK-DOT-I8MM-LABEL: udot_v16i8tov2i32:
 ; CHECK-DOT-I8MM:       // %bb.0: // %entry
 ; CHECK-DOT-I8MM-NEXT:    movi v2.16b, #1
 ; CHECK-DOT-I8MM-NEXT:    fmov d0, d0
 ; CHECK-DOT-I8MM-NEXT:    udot v0.4s, v1.16b, v2.16b
-; CHECK-DOT-I8MM-NEXT:    ext v1.16b, v0.16b, v0.16b, #8
-; CHECK-DOT-I8MM-NEXT:    add v0.2s, v0.2s, v1.2s
+; CHECK-DOT-I8MM-NEXT:    addp v0.4s, v0.4s, v0.4s
+; CHECK-DOT-I8MM-NEXT:    // kill: def $d0 killed $d0 killed $q0
 ; CHECK-DOT-I8MM-NEXT:    ret
 entry:
     %input.wide = zext <16 x i8> %input to <16 x i32>