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[KnownBits][NFC] Add tests for lerp pattern
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‎llvm/test/Transforms/InstCombine/known-bits-lerp-pattern.ll‎

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; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 5
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; RUN: opt < %s -passes=instcombine -S | FileCheck %s
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; Test known bits refinements for pattern: a * (b - c) + c * d
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; where a > 0, c > 0, b > 0, d > 0, and b > c.
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; This pattern is a generalization of lerp and it appears frequently in graphics operations.
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define i32 @test_clamp(i8 %a, i8 %c, i8 %d) {
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; CHECK-LABEL: define i32 @test_clamp(
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; CHECK-SAME: i8 [[A:%.*]], i8 [[C:%.*]], i8 [[D:%.*]]) {
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; CHECK-NEXT: [[A32:%.*]] = zext i8 [[A]] to i32
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; CHECK-NEXT: [[C32:%.*]] = zext i8 [[C]] to i32
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; CHECK-NEXT: [[D32:%.*]] = zext i8 [[D]] to i32
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; CHECK-NEXT: [[SUB:%.*]] = xor i32 [[C32]], 255
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; CHECK-NEXT: [[MUL1:%.*]] = mul nuw nsw i32 [[SUB]], [[A32]]
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; CHECK-NEXT: [[MUL2:%.*]] = mul nuw nsw i32 [[C32]], [[D32]]
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; CHECK-NEXT: [[ADD:%.*]] = add nuw nsw i32 [[MUL1]], [[MUL2]]
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; CHECK-NEXT: [[RESULT:%.*]] = call i32 @llvm.umin.i32(i32 [[ADD]], i32 65535)
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; CHECK-NEXT: ret i32 [[RESULT]]
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;
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%a32 = zext i8 %a to i32
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%c32 = zext i8 %c to i32
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%d32 = zext i8 %d to i32
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%sub = sub i32 255, %c32
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%mul1 = mul i32 %a32, %sub
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%mul2 = mul i32 %c32, %d32
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%add = add i32 %mul1, %mul2
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%cmp = icmp ugt i32 %add, 65535
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%result = select i1 %cmp, i32 65535, i32 %add
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ret i32 %result
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}
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define i1 @test_trunc_cmp(i8 %a, i8 %c, i8 %d) {
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; CHECK-LABEL: define i1 @test_trunc_cmp(
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; CHECK-SAME: i8 [[A:%.*]], i8 [[C:%.*]], i8 [[D:%.*]]) {
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; CHECK-NEXT: [[A32:%.*]] = zext i8 [[A]] to i32
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; CHECK-NEXT: [[C32:%.*]] = zext i8 [[C]] to i32
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; CHECK-NEXT: [[D32:%.*]] = zext i8 [[D]] to i32
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; CHECK-NEXT: [[SUB:%.*]] = xor i32 [[C32]], 255
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; CHECK-NEXT: [[MUL1:%.*]] = mul nuw nsw i32 [[SUB]], [[A32]]
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; CHECK-NEXT: [[MUL2:%.*]] = mul nuw nsw i32 [[C32]], [[D32]]
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; CHECK-NEXT: [[ADD:%.*]] = add nuw nsw i32 [[MUL1]], [[MUL2]]
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; CHECK-NEXT: [[TRUNC:%.*]] = trunc i32 [[ADD]] to i16
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; CHECK-NEXT: [[CMP:%.*]] = icmp eq i16 [[TRUNC]], 1234
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; CHECK-NEXT: ret i1 [[CMP]]
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;
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%a32 = zext i8 %a to i32
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%c32 = zext i8 %c to i32
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%d32 = zext i8 %d to i32
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%sub = sub i32 255, %c32
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%mul1 = mul i32 %a32, %sub
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%mul2 = mul i32 %c32, %d32
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%add = add i32 %mul1, %mul2
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%trunc = trunc i32 %add to i16
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%cmp = icmp eq i16 %trunc, 1234
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ret i1 %cmp
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}
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define i1 @test_trunc_cmp_xor(i8 %a, i8 %c, i8 %d) {
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; CHECK-LABEL: define i1 @test_trunc_cmp_xor(
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; CHECK-SAME: i8 [[A:%.*]], i8 [[C:%.*]], i8 [[D:%.*]]) {
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; CHECK-NEXT: [[A32:%.*]] = zext i8 [[A]] to i32
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; CHECK-NEXT: [[C32:%.*]] = zext i8 [[C]] to i32
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; CHECK-NEXT: [[D32:%.*]] = zext i8 [[D]] to i32
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; CHECK-NEXT: [[SUB:%.*]] = xor i32 [[C32]], 255
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; CHECK-NEXT: [[MUL1:%.*]] = mul nuw nsw i32 [[SUB]], [[A32]]
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; CHECK-NEXT: [[MUL2:%.*]] = mul nuw nsw i32 [[C32]], [[D32]]
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; CHECK-NEXT: [[ADD:%.*]] = add nuw nsw i32 [[MUL1]], [[MUL2]]
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; CHECK-NEXT: [[TRUNC:%.*]] = trunc i32 [[ADD]] to i16
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; CHECK-NEXT: [[CMP:%.*]] = icmp eq i16 [[TRUNC]], 1234
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; CHECK-NEXT: ret i1 [[CMP]]
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;
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%a32 = zext i8 %a to i32
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%c32 = zext i8 %c to i32
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%d32 = zext i8 %d to i32
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%sub = xor i32 255, %c32
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%mul1 = mul i32 %a32, %sub
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%mul2 = mul i32 %c32, %d32
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%add = add i32 %mul1, %mul2
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%trunc = trunc i32 %add to i16
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%cmp = icmp eq i16 %trunc, 1234
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ret i1 %cmp
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}
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define i1 @test_trunc_cmp_arbitrary_b(i8 %a, i8 %b, i8 %c, i8 %d) {
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; CHECK-LABEL: define i1 @test_trunc_cmp_arbitrary_b(
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; CHECK-SAME: i8 [[A:%.*]], i8 [[B:%.*]], i8 [[C:%.*]], i8 [[D:%.*]]) {
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; CHECK-NEXT: [[A32:%.*]] = zext i8 [[A]] to i32
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; CHECK-NEXT: [[B32:%.*]] = zext i8 [[B]] to i32
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; CHECK-NEXT: [[C32:%.*]] = zext i8 [[C]] to i32
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; CHECK-NEXT: [[D32:%.*]] = zext i8 [[D]] to i32
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; CHECK-NEXT: [[SUB:%.*]] = sub nuw nsw i32 [[B32]], [[C32]]
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; CHECK-NEXT: [[MUL1:%.*]] = mul nuw nsw i32 [[SUB]], [[A32]]
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; CHECK-NEXT: [[MUL2:%.*]] = mul nuw nsw i32 [[C32]], [[D32]]
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; CHECK-NEXT: [[ADD:%.*]] = add nuw nsw i32 [[MUL1]], [[MUL2]]
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; CHECK-NEXT: [[TRUNC:%.*]] = trunc i32 [[ADD]] to i16
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; CHECK-NEXT: [[CMP:%.*]] = icmp eq i16 [[TRUNC]], 1234
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; CHECK-NEXT: ret i1 [[CMP]]
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;
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%a32 = zext i8 %a to i32
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%b32 = zext i8 %b to i32
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%c32 = zext i8 %c to i32
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%d32 = zext i8 %d to i32
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%sub = sub nsw nuw i32 %b32, %c32
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%mul1 = mul i32 %a32, %sub
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%mul2 = mul i32 %c32, %d32
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%add = add i32 %mul1, %mul2
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%trunc = trunc i32 %add to i16
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%cmp = icmp eq i16 %trunc, 1234
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ret i1 %cmp
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}
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define i1 @test_trunc_cmp_no_a(i8 %b, i8 %c, i8 %d) {
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; CHECK-LABEL: define i1 @test_trunc_cmp_no_a(
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; CHECK-SAME: i8 [[B:%.*]], i8 [[C:%.*]], i8 [[D:%.*]]) {
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; CHECK-NEXT: [[B32:%.*]] = zext i8 [[B]] to i32
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; CHECK-NEXT: [[C32:%.*]] = zext i8 [[C]] to i32
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; CHECK-NEXT: [[D32:%.*]] = zext i8 [[D]] to i32
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; CHECK-NEXT: [[MUL1:%.*]] = sub nuw nsw i32 [[B32]], [[C32]]
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; CHECK-NEXT: [[MUL2:%.*]] = mul nuw nsw i32 [[C32]], [[D32]]
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; CHECK-NEXT: [[ADD:%.*]] = add nuw nsw i32 [[MUL1]], [[MUL2]]
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; CHECK-NEXT: [[TRUNC:%.*]] = trunc i32 [[ADD]] to i16
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; CHECK-NEXT: [[CMP:%.*]] = icmp eq i16 [[TRUNC]], 1234
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; CHECK-NEXT: ret i1 [[CMP]]
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;
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%b32 = zext i8 %b to i32
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%c32 = zext i8 %c to i32
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%d32 = zext i8 %d to i32
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%sub = sub nuw i32 %b32, %c32
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%mul2 = mul i32 %c32, %d32
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%add = add i32 %sub, %mul2
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%trunc = trunc i32 %add to i16
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%cmp = icmp eq i16 %trunc, 1234
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ret i1 %cmp
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}
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define i1 @test_trunc_cmp_no_d(i8 %a, i8 %b, i8 %c) {
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; CHECK-LABEL: define i1 @test_trunc_cmp_no_d(
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; CHECK-SAME: i8 [[A:%.*]], i8 [[B:%.*]], i8 [[C:%.*]]) {
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; CHECK-NEXT: [[A32:%.*]] = zext i8 [[A]] to i32
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; CHECK-NEXT: [[B32:%.*]] = zext i8 [[B]] to i32
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; CHECK-NEXT: [[C32:%.*]] = zext i8 [[C]] to i32
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; CHECK-NEXT: [[SUB:%.*]] = sub nuw nsw i32 [[B32]], [[C32]]
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; CHECK-NEXT: [[MUL1:%.*]] = mul nuw nsw i32 [[SUB]], [[A32]]
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; CHECK-NEXT: [[ADD:%.*]] = add nuw nsw i32 [[MUL1]], [[C32]]
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; CHECK-NEXT: [[TRUNC:%.*]] = trunc i32 [[ADD]] to i16
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; CHECK-NEXT: [[CMP:%.*]] = icmp eq i16 [[TRUNC]], 1234
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; CHECK-NEXT: ret i1 [[CMP]]
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;
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%a32 = zext i8 %a to i32
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%b32 = zext i8 %b to i32
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%c32 = zext i8 %c to i32
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%sub = sub nsw nuw i32 %b32, %c32
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%mul1 = mul i32 %a32, %sub
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%add = add i32 %mul1, %c32
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%trunc = trunc i32 %add to i16
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%cmp = icmp eq i16 %trunc, 1234
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ret i1 %cmp
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}
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declare void @llvm.assume(i1)

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