Skip to content

Commit af3232b

Browse files
committed
Adds many features to ARM InlineFeaturesAllowed
Removes FeatureD32 and FeatureFP64 from black list in comments as: - In https://reviews.llvm.org/D34697#805590 D16 and VFPOnlySP were added to this allowlist because they do "the opposite of what you would expect. - https://github.com/llvm/llvm-project/commit/760df47b778a530e9368a4b8706940ba103d57ba#diff-8165208908f69b3582d556451[…]6c4b474f2bf32c4ac7fec031cf2efd replaces the previous features with the inverse, but incorrectly keeps them in the allow list as the original reasoning no longer applies. Some subtarget features provide different instructions depending on whether they are set or unset, these features are believed safe as *not* having these features present does not add instructions.
1 parent 0922a15 commit af3232b

File tree

1 file changed

+37
-1
lines changed

1 file changed

+37
-1
lines changed

llvm/lib/Target/ARM/ARMTargetTransformInfo.h

Lines changed: 37 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -64,14 +64,50 @@ class ARMTTIImpl final : public BasicTTIImplBase<ARMTTIImpl> {
6464
const ARMTargetLowering *TLI;
6565

6666
// Currently the following features are excluded from InlineFeaturesAllowed.
67-
// ModeThumb, FeatureNoARM, ModeSoftFloat, FeatureFP64, FeatureD32
67+
// ModeThumb, FeatureNoARM, ModeSoftFloat.
6868
// Depending on whether they are set or unset, different
6969
// instructions/registers are available. For example, inlining a callee with
7070
// -thumb-mode in a caller with +thumb-mode, may cause the assembler to
7171
// fail if the callee uses ARM only instructions, e.g. in inline asm.
7272
const FeatureBitset InlineFeaturesAllowed = {
73+
ARM::FeatureD32,
74+
ARM::FeatureFPRegs64,
75+
ARM::FeatureFPRegs16,
76+
ARM::FeatureFPRegs,
77+
ARM::FeatureAES,
78+
ARM::FeatureVFP2_SP,
79+
ARM::FeatureSHA2,
80+
ARM::HasV5TEOps,
81+
ARM::HasV6Ops,
82+
ARM::HasV6KOps,
83+
ARM::HasV6T2Ops,
84+
ARM::HasV7Ops,
85+
ARM::HasV5TOps,
86+
ARM::HasV6MOps,
87+
ARM::HasV8MBaselineOps,
88+
ARM::HasV8MMainlineOps,
89+
ARM::HasV8_1aOps,
90+
ARM::HasV8_2aOps,
91+
ARM::HasV8_3aOps,
92+
ARM::HasV8_4aOps,
93+
ARM::HasV8_5aOps,
94+
ARM::HasV8_6aOps,
95+
ARM::HasV8_7aOps,
96+
ARM::HasV8_8aOps,
97+
ARM::HasV8_9aOps,
98+
ARM::HasV9_0aOps,
99+
ARM::HasV9_1aOps,
100+
ARM::HasV9_2aOps,
101+
ARM::HasV9_3aOps,
102+
ARM::HasV9_4aOps,
103+
ARM::HasV9_5aOps,
104+
ARM::HasV9_6aOps,
105+
ARM::HasV9_7aOps,
106+
ARM::HasV8_1MMainlineOps,
73107
ARM::FeatureDotProd,
74108
ARM::HasV8Ops,
109+
ARM::FeatureSB,
110+
ARM::FeatureBF16,
75111
ARM::FeatureVFP2,
76112
ARM::FeatureVFP3,
77113
ARM::FeatureNEON,

0 commit comments

Comments
 (0)