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Rename convertToImplicitVcc and move CarryDef up
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-9
lines changed

1 file changed

+8
-9
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llvm/lib/Target/AMDGPU/SIPeepholeSDWA.cpp

Lines changed: 8 additions & 9 deletions
Original file line numberDiff line numberDiff line change
@@ -62,7 +62,7 @@ class SIPeepholeSDWA {
6262
std::unique_ptr<SDWAOperand> matchSDWAOperand(MachineInstr &MI);
6363
void pseudoOpConvertToVOP2(MachineInstr &MI,
6464
const GCNSubtarget &ST) const;
65-
void convertToImplicitVcc(MachineInstr &MI, const GCNSubtarget &ST) const;
65+
void convertVcndmaskToVOP2(MachineInstr &MI, const GCNSubtarget &ST) const;
6666
MachineInstr *createSDWAVersion(MachineInstr &MI);
6767
bool convertToSDWA(MachineInstr &MI, const SDWAOperandsVector &SDWAOperands);
6868
void legalizeScalarOperands(MachineInstr &MI, const GCNSubtarget &ST) const;
@@ -1070,7 +1070,7 @@ void SIPeepholeSDWA::pseudoOpConvertToVOP2(MachineInstr &MI,
10701070
/// copies from the carry-in to VCC. The conversion will only be
10711071
/// applied if \p MI can be shrunk to VOP2 and if VCC can be proven to
10721072
/// be dead before \p MI.
1073-
void SIPeepholeSDWA::convertToImplicitVcc(MachineInstr &MI,
1073+
void SIPeepholeSDWA::convertVcndmaskToVOP2(MachineInstr &MI,
10741074
const GCNSubtarget &ST) const {
10751075
assert(MI.getOpcode() == AMDGPU::V_CNDMASK_B32_e64);
10761076

@@ -1082,22 +1082,21 @@ void SIPeepholeSDWA::convertToImplicitVcc(MachineInstr &MI,
10821082

10831083
const MachineOperand &CarryIn =
10841084
*TII->getNamedOperand(MI, AMDGPU::OpName::src2);
1085+
Register CarryReg = CarryIn.getReg();
1086+
MachineInstr *CarryDef = MRI->getVRegDef(CarryReg);
1087+
if (!CarryDef)
1088+
return;
10851089

10861090
// Make sure VCC or its subregs are dead before MI.
1087-
MachineBasicBlock &MBB = *MI.getParent();
10881091
MCRegister Vcc = TRI->getVCC();
1092+
MachineBasicBlock &MBB = *MI.getParent();
10891093
MachineBasicBlock::LivenessQueryResult Liveness =
10901094
MBB.computeRegisterLiveness(TRI, Vcc, MI);
10911095
if (Liveness != MachineBasicBlock::LQR_Dead) {
10921096
LLVM_DEBUG(dbgs() << "VCC not known to be dead before instruction.\n");
10931097
return;
10941098
}
10951099

1096-
Register CarryReg = CarryIn.getReg();
1097-
MachineInstr *CarryDef = MRI->getVRegDef(CarryReg);
1098-
if (!CarryDef)
1099-
return;
1100-
11011100
// Change destination of compare instruction to VCC
11021101
// or copy to VCC if carry-in is not a compare inst.
11031102
if (CarryDef->isCompare() && TII->isVOP3(*CarryDef) &&
@@ -1453,7 +1452,7 @@ bool SIPeepholeSDWA::run(MachineFunction &MF) {
14531452
pseudoOpConvertToVOP2(*PotentialMI, ST);
14541453
break;
14551454
case AMDGPU::V_CNDMASK_B32_e64:
1456-
convertToImplicitVcc(*PotentialMI, ST);
1455+
convertVcndmaskToVOP2(*PotentialMI, ST);
14571456
break;
14581457
};
14591458
}

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